riscos: Add CPU feature detection
parent
eb3d39bc8b
commit
78ce18f5cf
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@ -90,6 +90,11 @@
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#endif
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#endif
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#ifdef __RISCOS__
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#include <kernel.h>
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#include <swis.h>
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#endif
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#define CPU_HAS_RDTSC (1 << 0)
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#define CPU_HAS_ALTIVEC (1 << 1)
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#define CPU_HAS_MMX (1 << 2)
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@ -333,7 +338,7 @@ CPU_haveAltiVec(void)
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return altivec;
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}
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#if !defined(__ARM_ARCH)
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#if !defined(__arm__)
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static int
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CPU_haveARMSIMD(void)
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{
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@ -373,6 +378,27 @@ CPU_haveARMSIMD(void)
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return arm_simd;
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}
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#elif defined(__RISCOS__)
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static int
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CPU_haveARMSIMD(void)
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{
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_kernel_swi_regs regs;
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regs.r[0] = 0;
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if (_kernel_swi(OS_PlatformFeatures, ®s, ®s) != NULL)
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return 0;
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if (!(regs.r[0] & (1<<31)))
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return 0;
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regs.r[0] = 34;
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regs.r[1] = 29;
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if (_kernel_swi(OS_PlatformFeatures, ®s, ®s) != NULL)
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return 0;
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return regs.r[0];
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}
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#else
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static int
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CPU_haveARMSIMD(void)
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@ -419,7 +445,7 @@ CPU_haveNEON(void)
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# endif
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/* All WinRT ARM devices are required to support NEON, but just in case. */
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return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
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#elif !defined(__ARM_ARCH)
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#elif !defined(__arm__)
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return 0; /* not an ARM CPU at all. */
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#elif __ARM_ARCH >= 8
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return 1; /* ARMv8 always has non-optional NEON support. */
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@ -446,6 +472,18 @@ CPU_haveNEON(void)
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}
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return 0;
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}
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#elif defined(__RISCOS__)
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/* Use the VFPSupport_Features SWI to access the MVFR registers */
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{
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_kernel_swi_regs regs;
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regs.r[0] = 0;
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if (_kernel_swi(VFPSupport_Features, ®s, ®s) == NULL) {
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if ((regs.r[2] & 0xFFF000) == 0x111000) {
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return 1;
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}
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}
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return 0;
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}
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#else
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#warning SDL_HasNEON is not implemented for this ARM platform. Write me.
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return 0;
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@ -871,6 +909,15 @@ SDL_GetSystemRAM(void)
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SDL_SystemRAM = (int) (sysram / 0x100000U);
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}
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#endif
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#ifdef __RISCOS__
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if (SDL_SystemRAM <= 0) {
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_kernel_swi_regs regs;
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regs.r[0] = 0x108;
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if (_kernel_swi(OS_Memory, ®s, ®s) == NULL) {
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SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
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}
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}
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#endif
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#endif
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}
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return SDL_SystemRAM;
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