ARM: SIMD assembly optimization for BGR-to-RGB 32bpp normal blits
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8425d9d5d0
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7ac733f025
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@ -41,7 +41,8 @@
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enum blit_features {
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BLIT_FEATURE_HAS_MMX = 1,
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BLIT_FEATURE_HAS_ALTIVEC = 2,
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BLIT_FEATURE_ALTIVEC_DONT_USE_PREFETCH = 4
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BLIT_FEATURE_ALTIVEC_DONT_USE_PREFETCH = 4,
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BLIT_FEATURE_HAS_ARM_SIMD = 8
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};
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#if SDL_ALTIVEC_BLITTERS
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@ -931,7 +932,24 @@ GetBlitFeatures(void)
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#endif
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#else
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/* Feature 1 is has-MMX */
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#define GetBlitFeatures() (SDL_HasMMX() ? BLIT_FEATURE_HAS_MMX : 0)
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#define GetBlitFeatures() ((SDL_HasMMX() ? BLIT_FEATURE_HAS_MMX : 0) | (SDL_HasARMSIMD() ? BLIT_FEATURE_HAS_ARM_SIMD : 0))
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#endif
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#if SDL_ARM_SIMD_BLITTERS
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void Blit_BGR888_RGB888ARMSIMDAsm(int32_t w, int32_t h, uint32_t *dst, int32_t dst_stride, uint32_t *src, int32_t src_stride);
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static void
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Blit_BGR888_RGB888ARMSIMD(SDL_BlitInfo * info)
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{
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int32_t width = info->dst_w;
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int32_t height = info->dst_h;
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uint32_t *dstp = (uint32_t *)info->dst;
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int32_t dststride = width + (info->dst_skip >> 2);
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uint32_t *srcp = (uint32_t *)info->src;
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int32_t srcstride = width + (info->src_skip >> 2);
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Blit_BGR888_RGB888ARMSIMDAsm(width, height, dstp, dststride, srcp, srcstride);
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}
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#endif
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/* This is now endian dependent */
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@ -3269,6 +3287,10 @@ static const struct blit_table normal_blit_4[] = {
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/* has-altivec */
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{0x00000000, 0x00000000, 0x00000000, 2, 0x0000F800, 0x000007E0, 0x0000001F,
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BLIT_FEATURE_HAS_ALTIVEC, Blit_RGB888_RGB565Altivec, NO_ALPHA},
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#endif
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#if SDL_ARM_SIMD_BLITTERS
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{0x000000FF, 0x0000FF00, 0x00FF0000, 4, 0x00FF0000, 0x0000FF00, 0x000000FF,
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BLIT_FEATURE_HAS_ARM_SIMD, Blit_BGR888_RGB888ARMSIMD, NO_ALPHA | COPY_ALPHA },
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#endif
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/* 4->3 with same rgb triplet */
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{0x000000FF, 0x0000FF00, 0x00FF0000, 3, 0x000000FF, 0x0000FF00, 0x00FF0000,
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@ -363,3 +363,45 @@ generate_composite_function \
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nop_macro, /* cleanup */ \
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ARGBto565PixelAlpha_process_head, \
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ARGBto565PixelAlpha_process_tail
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/******************************************************************************/
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.macro BGR888toRGB888_1pixel cond, reg, tmp
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uxtb16&cond tmp, WK®, ror #8
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uxtb16&cond WK®, WK®, ror #16
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orr&cond WK®, WK®, tmp, lsl #8
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.endm
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.macro BGR888toRGB888_2pixels cond, reg1, reg2, tmp1, tmp2
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uxtb16&cond tmp1, WK®1, ror #8
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uxtb16&cond WK®1, WK®1, ror #16
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uxtb16&cond tmp2, WK®2, ror #8
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uxtb16&cond WK®2, WK®2, ror #16
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orr&cond WK®1, WK®1, tmp1, lsl #8
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orr&cond WK®2, WK®2, tmp2, lsl #8
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.endm
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.macro BGR888toRGB888_process_head cond, numbytes, firstreg, unaligned_src, unaligned_mask, preload
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pixld cond, numbytes, firstreg, SRC, unaligned_src
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.endm
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.macro BGR888toRGB888_process_tail cond, numbytes, firstreg
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.if numbytes >= 8
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BGR888toRGB888_2pixels cond, %(firstreg+0), %(firstreg+1), MASK, STRIDE_M
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.if numbytes == 16
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BGR888toRGB888_2pixels cond, %(firstreg+2), %(firstreg+3), MASK, STRIDE_M
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.endif
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.else @ numbytes == 4
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BGR888toRGB888_1pixel cond, %(firstreg+0), MASK
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.endif
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.endm
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generate_composite_function \
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Blit_BGR888_RGB888ARMSIMDAsm, 32, 0, 32, \
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FLAG_DST_WRITEONLY | FLAG_COND_EXEC | FLAG_PROCESS_PRESERVES_SCRATCH, \
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2, /* prefetch distance */ \
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nop_macro, /* init */ \
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nop_macro, /* newline */ \
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nop_macro, /* cleanup */ \
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BGR888toRGB888_process_head, \
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BGR888toRGB888_process_tail
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