2006-08-22 02:24:48 -06:00
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/**************************************************************************
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*
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* Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*
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**************************************************************************/
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/*
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* Authors: Thomas Hellstr<EFBFBD>m <thomas-at-tungstengraphics-dot-com>
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*/
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#include "drmP.h"
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2006-08-31 13:42:29 -06:00
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#include "i915_drm.h"
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#include "i915_drv.h"
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2006-08-22 02:24:48 -06:00
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2006-10-12 04:09:16 -06:00
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2006-10-17 11:57:06 -06:00
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drm_ttm_backend_t *i915_create_ttm_backend_entry(drm_device_t * dev)
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2006-08-22 02:24:48 -06:00
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{
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2006-10-18 08:54:17 -06:00
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return drm_agp_init_ttm(dev, NULL);
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2006-08-22 02:24:48 -06:00
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}
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2006-08-31 13:42:29 -06:00
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2006-10-17 11:57:06 -06:00
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int i915_fence_types(uint32_t buffer_flags, uint32_t * class, uint32_t * type)
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2006-08-31 13:42:29 -06:00
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{
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*class = 0;
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2006-10-17 11:57:06 -06:00
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if (buffer_flags & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
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2006-08-31 13:42:29 -06:00
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*type = 3;
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2006-09-01 03:23:21 -06:00
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else
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*type = 1;
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2006-08-31 13:42:29 -06:00
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return 0;
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}
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2006-10-17 11:57:06 -06:00
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int i915_invalidate_caches(drm_device_t * dev, uint32_t flags)
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2006-08-31 13:42:29 -06:00
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{
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2006-10-12 04:09:16 -06:00
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/*
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* FIXME: Only emit once per batchbuffer submission.
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*/
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2006-09-12 08:28:34 -06:00
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2006-08-31 13:42:29 -06:00
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uint32_t flush_cmd = MI_NO_WRITE_FLUSH;
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if (flags & DRM_BO_FLAG_READ)
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flush_cmd |= MI_READ_FLUSH;
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if (flags & DRM_BO_FLAG_EXE)
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flush_cmd |= MI_EXE_FLUSH;
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return i915_emit_mi_flush(dev, flush_cmd);
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}
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2007-01-31 06:50:57 -07:00
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int i915_init_mem_type(drm_device_t *dev, uint32_t type,
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drm_mem_type_manager_t *man)
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{
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switch(type) {
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case DRM_BO_MEM_LOCAL:
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2007-02-07 09:25:13 -07:00
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man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
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_DRM_FLAG_MEMTYPE_CACHED;
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break;
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2007-01-31 06:50:57 -07:00
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case DRM_BO_MEM_TT:
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2007-02-06 08:59:45 -07:00
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if (!(drm_core_has_AGP(dev) && dev->agp)) {
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DRM_ERROR("AGP is not enabled for memory type %u\n",
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(unsigned) type);
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return -EINVAL;
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}
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man->io_offset = dev->agp->agp_info.aper_base;
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man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
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man->io_addr = NULL;
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2007-01-31 06:50:57 -07:00
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man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
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2007-02-07 09:25:13 -07:00
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_DRM_FLAG_MEMTYPE_CSELECT |
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2007-02-06 08:59:45 -07:00
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_DRM_FLAG_NEEDS_IOREMAP;
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2007-01-31 06:50:57 -07:00
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break;
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case DRM_BO_MEM_PRIV0:
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if (!(drm_core_has_AGP(dev) && dev->agp)) {
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DRM_ERROR("AGP is not enabled for memory type %u\n",
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(unsigned) type);
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return -EINVAL;
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}
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man->io_offset = dev->agp->agp_info.aper_base;
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man->io_size = dev->agp->agp_info.aper_size * 1024 * 1024;
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2007-02-06 08:59:45 -07:00
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man->io_addr = NULL;
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2007-01-31 06:50:57 -07:00
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man->flags = _DRM_FLAG_MEMTYPE_MAPPABLE |
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_DRM_FLAG_MEMTYPE_FIXED |
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_DRM_FLAG_NEEDS_IOREMAP;
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break;
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default:
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DRM_ERROR("Unsupported memory type %u\n", (unsigned) type);
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return -EINVAL;
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}
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return 0;
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}
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2007-02-05 08:13:32 -07:00
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2007-02-06 06:20:33 -07:00
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uint32_t i915_evict_flags(drm_device_t *dev, uint32_t type)
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{
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switch(type) {
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case DRM_BO_MEM_LOCAL:
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case DRM_BO_MEM_TT:
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return DRM_BO_FLAG_MEM_LOCAL;
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default:
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return DRM_BO_FLAG_MEM_TT;
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}
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}
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2007-02-08 13:28:33 -07:00
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static void i915_emit_copy_blit(drm_device_t *dev,
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2007-02-05 08:13:32 -07:00
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uint32_t src_offset,
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uint32_t dst_offset,
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uint32_t pages,
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int direction)
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{
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uint32_t cur_pages;
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uint32_t stride = PAGE_SIZE;
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drm_i915_private_t *dev_priv = dev->dev_private;
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RING_LOCALS;
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if (!dev_priv)
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return;
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if (direction) {
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stride = -stride;
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src_offset += (pages - 1) << PAGE_SHIFT;
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dst_offset += (pages - 1) << PAGE_SHIFT;
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}
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while(pages > 0) {
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cur_pages = pages;
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if (cur_pages > 2048)
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cur_pages = 2048;
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pages -= cur_pages;
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BEGIN_LP_RING(8);
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OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
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XY_SRC_COPY_BLT_WRITE_RGB);
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OUT_RING((stride & 0xffff) | ( 0xcc << 16) | (1 << 24) |
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(1 << 25));
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OUT_RING(0);
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OUT_RING((cur_pages << 16) | (PAGE_SIZE >> 2));
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OUT_RING(dst_offset);
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OUT_RING(0);
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OUT_RING(stride & 0xffff);
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OUT_RING(src_offset);
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ADVANCE_LP_RING();
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dst_offset += (cur_pages << PAGE_SHIFT)*(direction ? -1 : 1);
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src_offset += (cur_pages << PAGE_SHIFT)*(direction ? -1 : 1);
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}
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return;
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}
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2007-02-08 13:28:33 -07:00
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static int drm_bo_move_blit(drm_buffer_object_t *bo,
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int evict,
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int no_wait,
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drm_bo_mem_reg_t *new_mem)
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{
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drm_bo_mem_reg_t *old_mem = &bo->mem;
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int dir = 0;
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if ((old_mem->mem_type == new_mem->mem_type) &&
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(new_mem->mm_node->start <
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old_mem->mm_node->start + old_mem->mm_node->size)) {
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dir = 1;
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}
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i915_emit_copy_blit(bo->dev,
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old_mem->mm_node->start << PAGE_SHIFT,
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new_mem->mm_node->start << PAGE_SHIFT,
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new_mem->num_pages,
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dir);
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i915_emit_mi_flush(bo->dev, MI_READ_FLUSH | MI_EXE_FLUSH);
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return drm_bo_move_accel_cleanup(bo, evict, no_wait,
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DRM_FENCE_TYPE_EXE |
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DRM_I915_FENCE_TYPE_RW,
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DRM_I915_FENCE_FLAG_FLUSHED,
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new_mem);
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}
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