2006-08-26 16:55:02 -06:00
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/*
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* Copyright 2005 Stephane Marchesin.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NOUVEAU_DRM_H__
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#define __NOUVEAU_DRM_H__
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2006-10-10 16:28:15 -06:00
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typedef struct drm_nouveau_fifo_alloc {
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2006-08-26 16:55:02 -06:00
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int channel;
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uint32_t put_base;
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/* FIFO control regs */
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drm_handle_t ctrl;
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int ctrl_size;
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/* DMA command buffer */
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drm_handle_t cmdbuf;
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int cmdbuf_size;
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}
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2006-10-10 16:28:15 -06:00
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drm_nouveau_fifo_alloc_t;
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2006-08-26 16:55:02 -06:00
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typedef struct drm_nouveau_object_init {
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uint32_t handle;
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int class;
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uint32_t flags0, flags1, flags2;
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/* these are object handles */
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uint32_t dma0;
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uint32_t dma1;
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uint32_t dma_notifier;
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}
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drm_nouveau_object_init_t;
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typedef struct drm_nouveau_dma_object_init {
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uint32_t handle;
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int access;
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int target;
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uint32_t offset;
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int size;
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}
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drm_nouveau_dma_object_init_t;
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#define NOUVEAU_MEM_FB 0x00000001
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#define NOUVEAU_MEM_AGP 0x00000002
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#define NOUVEAU_MEM_FB_ACCEPTABLE 0x00000004
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#define NOUVEAU_MEM_AGP_ACCEPTABLE 0x00000008
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#define NOUVEAU_MEM_PINNED 0x00000010
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#define NOUVEAU_MEM_USER_BACKED 0x00000020
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#define NOUVEAU_MEM_MAPPED 0x00000040
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typedef struct drm_nouveau_mem_alloc {
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int flags;
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int alignment;
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uint64_t size; // in bytes
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uint64_t __user *region_offset;
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}
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drm_nouveau_mem_alloc_t;
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typedef struct drm_nouveau_mem_free {
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int flags;
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uint64_t region_offset;
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}
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drm_nouveau_mem_free_t;
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2006-08-30 00:55:02 -06:00
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typedef struct drm_nouveau_getparam {
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unsigned int param;
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unsigned int value;
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}
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drm_nouveau_getparam_t;
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2006-09-02 14:36:06 -06:00
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#define NOUVEAU_SETPARAM_CMDBUF_LOCATION 1
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#define NOUVEAU_SETPARAM_CMDBUF_SIZE 2
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2006-08-30 00:55:02 -06:00
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typedef struct drm_nouveau_setparam {
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unsigned int param;
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unsigned int value;
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}
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drm_nouveau_setparam_t;
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2006-08-26 16:55:02 -06:00
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enum nouveau_card_type {
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NV_UNKNOWN =0,
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NV_01 =1,
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NV_03 =3,
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NV_04 =4,
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NV_05 =5,
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NV_10 =10,
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NV_20 =20,
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NV_30 =30,
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NV_40 =40,
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G_70 =50,
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NV_LAST =0xffff,
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};
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enum nouveau_bus_type {
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NV_AGP =0,
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NV_PCI =1,
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NV_PCIE =2,
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};
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#define NOUVEAU_MAX_SAREA_CLIPRECTS 16
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typedef struct drm_nouveau_sarea {
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/* the cliprects */
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drm_clip_rect_t boxes[NOUVEAU_MAX_SAREA_CLIPRECTS];
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unsigned int nbox;
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}
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drm_nouveau_sarea_t;
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2006-10-10 16:28:15 -06:00
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#define DRM_NOUVEAU_FIFO_ALLOC 0x00
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#define DRM_NOUVEAU_OBJECT_INIT 0x01
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#define DRM_NOUVEAU_DMA_OBJECT_INIT 0x02 // We don't want this eventually..
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#define DRM_NOUVEAU_MEM_ALLOC 0x03
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#define DRM_NOUVEAU_MEM_FREE 0x04
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#define DRM_NOUVEAU_GETPARAM 0x05
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#define DRM_NOUVEAU_SETPARAM 0x06
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2006-08-26 16:55:02 -06:00
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#endif /* __NOUVEAU_DRM_H__ */
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