459 lines
15 KiB
C
459 lines
15 KiB
C
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/*
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* Copyright © 2018 NVIDIA Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <errno.h>
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#include <string.h>
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#include "private.h"
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#include "tegra.h"
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#include "vic.h"
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#include "vic30.h"
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struct vic30 {
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struct vic base;
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struct {
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struct drm_tegra_mapping *map;
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struct drm_tegra_bo *bo;
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} config;
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struct {
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struct drm_tegra_mapping *map;
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struct drm_tegra_bo *bo;
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} filter;
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struct {
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struct drm_tegra_mapping *map;
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struct drm_tegra_bo *bo;
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} hist;
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};
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static int vic30_fill(struct vic *v, struct vic_image *output,
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unsigned int left, unsigned int top,
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unsigned int right, unsigned int bottom,
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unsigned int alpha, unsigned int red,
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unsigned int green, unsigned int blue)
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{
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struct vic30 *vic = container_of(v, struct vic30, base);
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ConfigStruct *c;
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int err;
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err = drm_tegra_bo_map(vic->config.bo, (void **)&c);
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if (err < 0) {
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fprintf(stderr, "failed to map configuration structure: %s\n",
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strerror(-err));
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return err;
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}
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memset(c, 0, sizeof(*c));
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c->surfaceList0Struct.TargetRectLeft = left;
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c->surfaceList0Struct.TargetRectTop = top;
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c->surfaceList0Struct.TargetRectRight = right;
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c->surfaceList0Struct.TargetRectBottom = bottom;
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c->blending0Struct.PixelFormat = output->format;
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c->blending0Struct.BackgroundAlpha = alpha;
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c->blending0Struct.BackgroundR = red;
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c->blending0Struct.BackgroundG = green;
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c->blending0Struct.BackgroundB = blue;
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c->blending0Struct.LumaWidth = output->stride - 1;
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c->blending0Struct.LumaHeight = output->height - 1;
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c->blending0Struct.ChromaWidth = 16383;
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c->blending0Struct.ChromaWidth = 16383;
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c->blending0Struct.TargetRectLeft = left;
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c->blending0Struct.TargetRectTop = top;
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c->blending0Struct.TargetRectRight = right;
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c->blending0Struct.TargetRectBottom = bottom;
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c->blending0Struct.SurfaceWidth = output->width - 1;
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c->blending0Struct.SurfaceHeight = output->height - 1;
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c->blending0Struct.BlkKind = output->kind;
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c->blending0Struct.BlkHeight = 0;
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c->fetchControl0Struct.TargetRectLeft = left;
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c->fetchControl0Struct.TargetRectTop = top;
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c->fetchControl0Struct.TargetRectRight = right;
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c->fetchControl0Struct.TargetRectBottom = bottom;
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drm_tegra_bo_unmap(vic->config.bo);
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return 0;
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}
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static int vic30_blit(struct vic *v, struct vic_image *output,
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struct vic_image *input)
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{
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struct vic30 *vic = container_of(v, struct vic30, base);
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ColorConversionLumaAlphaStruct *ccla;
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ColorConversionMatrixStruct *ccm;
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ColorConversionClampStruct *ccc;
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SurfaceListSurfaceStruct *s;
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BlendingSurfaceStruct *b;
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SurfaceCache0Struct *sc;
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ConfigStruct *c;
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int err;
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err = drm_tegra_bo_map(vic->config.bo, (void **)&c);
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if (err < 0) {
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fprintf(stderr, "failed to map configuration structure: %s\n",
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strerror(-err));
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return err;
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}
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memset(c, 0, sizeof(*c));
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c->surfaceList0Struct.TargetRectLeft = 0;
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c->surfaceList0Struct.TargetRectTop = 0;
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c->surfaceList0Struct.TargetRectRight = output->width - 1;
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c->surfaceList0Struct.TargetRectBottom = output->height - 1;
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c->blending0Struct.PixelFormat = output->format;
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c->blending0Struct.BackgroundAlpha = 0;
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c->blending0Struct.BackgroundR = 0;
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c->blending0Struct.BackgroundG = 0;
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c->blending0Struct.BackgroundB = 0;
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c->blending0Struct.LumaWidth = output->stride - 1;
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c->blending0Struct.LumaHeight = output->height - 1;
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c->blending0Struct.ChromaWidth = 16383;
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c->blending0Struct.ChromaWidth = 16383;
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c->blending0Struct.TargetRectLeft = 0;
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c->blending0Struct.TargetRectTop = 0;
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c->blending0Struct.TargetRectRight = output->width - 1;
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c->blending0Struct.TargetRectBottom = output->height - 1;
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c->blending0Struct.SurfaceWidth = output->width - 1;
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c->blending0Struct.SurfaceHeight = output->height - 1;
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c->blending0Struct.BlkKind = output->kind;
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c->blending0Struct.BlkHeight = 0;
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c->fetchControl0Struct.TargetRectLeft = 0;
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c->fetchControl0Struct.TargetRectTop = 0;
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c->fetchControl0Struct.TargetRectRight = output->width - 1;
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c->fetchControl0Struct.TargetRectBottom = output->height - 1;
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/* setup fetch parameters for slot 0 */
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c->fetchControl0Struct.Enable0 = 0x1;
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c->fetchControl0Struct.Iir0 = 0x300;
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/* setup cache parameters for slot 0 */
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sc = &c->surfaceCache0Struct;
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sc->PixelFormat0 = input->format;
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/* setup surface configuration for slot 0 */
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s = &c->surfaceListSurfaceStruct[0];
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s->Enable = 1;
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s->FrameFormat = DXVAHD_FRAME_FORMAT_PROGRESSIVE;
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s->PixelFormat = input->format;
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s->SurfaceWidth = input->width - 1;
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s->SurfaceHeight = input->height - 1;
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s->LumaWidth = input->stride - 1;
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s->LumaHeight = input->height - 1;
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s->ChromaWidth = 16383;
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s->ChromaHeight = 16383;
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s->CacheWidth = VIC_CACHE_WIDTH_256Bx1; //VIC_CACHE_WIDTH_16Bx16;
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s->BlkKind = input->kind;
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s->BlkHeight = 0;
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s->DestRectLeft = 0;
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s->DestRectTop = 0;
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s->DestRectRight = output->width - 1;
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s->DestRectBottom = output->height - 1;
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s->SourceRectLeft = 0 << 16;
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s->SourceRectTop = 0 << 16;
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s->SourceRectRight = (input->width - 1) << 16;
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s->SourceRectBottom = (input->height - 1) << 16;
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/* setup color conversion for slot 0 */
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ccla = &c->colorConversionLumaAlphaStruct[0];
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ccla->PlanarAlpha = 1023;
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ccla->ConstantAlpha = 0;
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ccm = &c->colorConversionMatrixStruct[0];
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ccm->c00 = 1023;
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ccm->c11 = 1023;
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ccm->c22 = 1023;
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ccc = &c->colorConversionClampStruct[0];
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ccc->low = 0;
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ccc->high = 1023;
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/* setup blending for slot 0 */
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b = &c->blendingSurfaceStruct[0];
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b->AlphaK1 = 1023;
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b->SrcFactCMatchSelect = VIC_BLEND_SRCFACTC_K1;
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b->SrcFactAMatchSelect = VIC_BLEND_SRCFACTA_K1;
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b->DstFactCMatchSelect = VIC_BLEND_DSTFACTC_NEG_K1_TIMES_SRC;
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b->DstFactAMatchSelect = VIC_BLEND_DSTFACTA_NEG_K1_TIMES_SRC;
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drm_tegra_bo_unmap(vic->config.bo);
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return 0;
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}
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static int vic30_flip(struct vic *v, struct vic_image *output,
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struct vic_image *input)
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{
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struct vic30 *vic = container_of(v, struct vic30, base);
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ColorConversionLumaAlphaStruct *ccla;
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ColorConversionMatrixStruct *ccm;
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ColorConversionClampStruct *ccc;
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SurfaceListSurfaceStruct *s;
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BlendingSurfaceStruct *b;
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SurfaceCache0Struct *sc;
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ConfigStruct *c;
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int err;
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err = drm_tegra_bo_map(vic->config.bo, (void **)&c);
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if (err < 0) {
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fprintf(stderr, "failed to map configuration structure: %s\n",
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strerror(-err));
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return err;
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}
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memset(c, 0, sizeof(*c));
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c->surfaceList0Struct.TargetRectLeft = 0;
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c->surfaceList0Struct.TargetRectTop = 0;
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c->surfaceList0Struct.TargetRectRight = output->width - 1;
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c->surfaceList0Struct.TargetRectBottom = output->height - 1;
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c->blending0Struct.PixelFormat = output->format;
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c->blending0Struct.BackgroundAlpha = 0;
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c->blending0Struct.BackgroundR = 0;
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c->blending0Struct.BackgroundG = 0;
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c->blending0Struct.BackgroundB = 0;
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c->blending0Struct.LumaWidth = output->stride - 1;
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c->blending0Struct.LumaHeight = output->height - 1;
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c->blending0Struct.ChromaWidth = 16383;
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c->blending0Struct.ChromaWidth = 16383;
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c->blending0Struct.TargetRectLeft = 0;
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c->blending0Struct.TargetRectTop = 0;
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c->blending0Struct.TargetRectRight = output->width - 1;
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c->blending0Struct.TargetRectBottom = output->height - 1;
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c->blending0Struct.SurfaceWidth = output->width - 1;
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c->blending0Struct.SurfaceHeight = output->height - 1;
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c->blending0Struct.BlkKind = output->kind;
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c->blending0Struct.BlkHeight = 0;
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c->blending0Struct.OutputFlipY = 1;
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c->fetchControl0Struct.TargetRectLeft = 0;
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c->fetchControl0Struct.TargetRectTop = 0;
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c->fetchControl0Struct.TargetRectRight = output->width - 1;
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c->fetchControl0Struct.TargetRectBottom = output->height - 1;
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/* setup fetch parameters for slot 0 */
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c->fetchControl0Struct.Enable0 = 0x1;
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c->fetchControl0Struct.Iir0 = 0x300;
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/* setup cache parameters for slot 0 */
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sc = &c->surfaceCache0Struct;
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sc->PixelFormat0 = input->format;
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/* setup surface configuration for slot 0 */
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s = &c->surfaceListSurfaceStruct[0];
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s->Enable = 1;
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s->FrameFormat = DXVAHD_FRAME_FORMAT_PROGRESSIVE;
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s->PixelFormat = input->format;
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s->SurfaceWidth = input->width - 1;
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s->SurfaceHeight = input->height - 1;
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s->LumaWidth = input->stride - 1;
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s->LumaHeight = input->height - 1;
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s->ChromaWidth = 16383;
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s->ChromaHeight = 16383;
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s->CacheWidth = VIC_CACHE_WIDTH_256Bx1;
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s->BlkKind = input->kind;
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s->BlkHeight = 0;
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s->DestRectLeft = 0;
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s->DestRectTop = 0;
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s->DestRectRight = output->width - 1;
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s->DestRectBottom = output->height - 1;
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s->SourceRectLeft = 0 << 16;
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s->SourceRectTop = 0 << 16;
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s->SourceRectRight = (input->width - 1) << 16;
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s->SourceRectBottom = (input->height - 1) << 16;
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/* setup color conversion for slot 0 */
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ccla = &c->colorConversionLumaAlphaStruct[0];
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ccla->PlanarAlpha = 1023;
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ccla->ConstantAlpha = 0;
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ccm = &c->colorConversionMatrixStruct[0];
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ccm->c00 = 1023;
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ccm->c11 = 1023;
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ccm->c22 = 1023;
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ccc = &c->colorConversionClampStruct[0];
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ccc->low = 0;
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ccc->high = 1023;
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/* setup blending for slot 0 */
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b = &c->blendingSurfaceStruct[0];
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b->AlphaK1 = 1023;
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b->SrcFactCMatchSelect = VIC_BLEND_SRCFACTC_K1;
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b->SrcFactAMatchSelect = VIC_BLEND_SRCFACTA_K1;
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b->DstFactCMatchSelect = VIC_BLEND_DSTFACTC_NEG_K1_TIMES_SRC;
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b->DstFactAMatchSelect = VIC_BLEND_DSTFACTA_NEG_K1_TIMES_SRC;
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drm_tegra_bo_unmap(vic->config.bo);
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return 0;
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}
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static int vic30_execute(struct vic *v, struct drm_tegra_pushbuf *pushbuf,
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uint32_t **ptrp, struct vic_image *output,
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struct vic_image **inputs, unsigned int num_inputs)
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{
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struct vic30 *vic = container_of(v, struct vic30, base);
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unsigned int i;
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if (num_inputs > 1)
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return -EINVAL;
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VIC_PUSH_METHOD(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_SET_APPLICATION_ID, 1);
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VIC_PUSH_METHOD(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_SET_CONTROL_PARAMS, (sizeof(ConfigStruct) / 16) << 16);
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VIC_PUSH_BUFFER(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_SET_CONFIG_STRUCT_OFFSET, vic->config.map, 0, 0);
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VIC_PUSH_BUFFER(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_SET_HIST_OFFSET, vic->hist.map, 0, 0);
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VIC_PUSH_BUFFER(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_SET_OUTPUT_SURFACE_LUMA_OFFSET, output->map, 0, 0);
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for (i = 0; i < num_inputs; i++)
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VIC_PUSH_BUFFER(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_SET_SURFACE0_SLOT0_LUMA_OFFSET, inputs[i]->map, 0, 0);
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VIC_PUSH_METHOD(pushbuf, ptrp, NVA0B6_VIDEO_COMPOSITOR_EXECUTE, 1 << 8);
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return 0;
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}
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static void vic30_free(struct vic *v)
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{
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struct vic30 *vic = container_of(v, struct vic30, base);
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drm_tegra_channel_unmap(vic->hist.map);
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drm_tegra_bo_unref(vic->hist.bo);
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drm_tegra_channel_unmap(vic->filter.map);
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drm_tegra_bo_unref(vic->filter.bo);
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drm_tegra_channel_unmap(vic->config.map);
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drm_tegra_bo_unref(vic->config.bo);
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drm_tegra_syncpoint_free(v->syncpt);
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free(vic);
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}
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static const struct vic_ops vic30_ops = {
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.fill = vic30_fill,
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.blit = vic30_blit,
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.flip = vic30_flip,
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.execute = vic30_execute,
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.free = vic30_free,
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};
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int vic30_new(struct drm_tegra *drm, struct drm_tegra_channel *channel,
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struct vic **vicp)
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{
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struct vic30 *vic;
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void *ptr;
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int err;
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vic = calloc(1, sizeof(*vic));
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if (!vic)
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return -ENOMEM;
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vic->base.drm = drm;
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vic->base.channel = channel;
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vic->base.ops = &vic30_ops;
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vic->base.version = 0x40;
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err = drm_tegra_syncpoint_new(drm, &vic->base.syncpt);
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if (err < 0) {
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fprintf(stderr, "failed to allocate syncpoint: %s\n", strerror(-err));
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return err;
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}
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err = drm_tegra_bo_new(drm, 0, 16384, &vic->config.bo);
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if (err < 0) {
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fprintf(stderr, "failed to allocate configuration structure: %s\n",
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strerror(-err));
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||
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return err;
|
||
|
}
|
||
|
|
||
|
err = drm_tegra_channel_map(channel, vic->config.bo, DRM_TEGRA_CHANNEL_MAP_READ,
|
||
|
&vic->config.map);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to map configuration structure: %s\n",
|
||
|
strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
err = drm_tegra_bo_new(drm, 0, 16384, &vic->filter.bo);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to allocate filter buffer: %s\n",
|
||
|
strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
err = drm_tegra_bo_map(vic->filter.bo, &ptr);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to map filter buffer: %s\n", strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
memset(ptr, 0, 16384);
|
||
|
drm_tegra_bo_unmap(vic->filter.bo);
|
||
|
|
||
|
err = drm_tegra_channel_map(channel, vic->filter.bo, DRM_TEGRA_CHANNEL_MAP_READ,
|
||
|
&vic->filter.map);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to map filter buffer: %s\n",
|
||
|
strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
err = drm_tegra_bo_new(drm, 0, 4096, &vic->hist.bo);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to allocate history buffer: %s\n",
|
||
|
strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
err = drm_tegra_bo_map(vic->hist.bo, &ptr);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to map history buffer: %s\n", strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
memset(ptr, 0, 4096);
|
||
|
drm_tegra_bo_unmap(vic->hist.bo);
|
||
|
|
||
|
err = drm_tegra_channel_map(channel, vic->hist.bo, DRM_TEGRA_CHANNEL_MAP_READ_WRITE,
|
||
|
&vic->hist.map);
|
||
|
if (err < 0) {
|
||
|
fprintf(stderr, "failed to map histogram buffer: %s\n",
|
||
|
strerror(-err));
|
||
|
return err;
|
||
|
}
|
||
|
|
||
|
if (vicp)
|
||
|
*vicp = &vic->base;
|
||
|
|
||
|
return 0;
|
||
|
}
|