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drm/shared/via_dma.c

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This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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/* via_dma.c -- DMA support for the VIA Unichrome/Pro
*/
/**************************************************************************
*
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
*
* Copyright 2004 Digeo, Inc., Palo Alto, CA, U.S.A.
* All Rights Reserved.
*
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
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* Copyright 2004 The Unichrome project.
* All Rights Reserved.
*
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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**************************************************************************/
Fix the shared directory I accidentally stomped on
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#include "via.h"
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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#include "drmP.h"
#include "drm.h"
#include "via_drm.h"
#include "via_drv.h"
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
#include "via_3d_reg.h"
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
#define via_flush_write_combine() DRM_MEMORYBARRIER()
#define VIA_OUT_RING_QW(w1,w2) \
*vb++ = (w1); \
*vb++ = (w2); \
dev_priv->dma_low += 8;
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
#define PCI_BUF_SIZE 512000
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
static char pci_buf[PCI_BUF_SIZE];
static unsigned long pci_bufsiz = PCI_BUF_SIZE;
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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static void via_cmdbuf_start(drm_via_private_t * dev_priv);
static void via_cmdbuf_pause(drm_via_private_t * dev_priv);
static void via_cmdbuf_reset(drm_via_private_t * dev_priv);
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv);
Changed unsigned to uint32_t in some ioctl parameters. Introduced first rudimentary command verifier for dma buffers. Changed the decoder futex ioctl parameters. Bumped the via major version number.
2004-10-08 15:11:02 -06:00
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
/*
* Free space in command buffer.
*/
static uint32_t
via_cmdbuf_space(drm_via_private_t *dev_priv)
{
uint32_t agp_base = dev_priv->dma_offset +
(uint32_t) dev_priv->agpAddr;
uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
return ((hw_addr <= dev_priv->dma_low) ?
(dev_priv->dma_high + hw_addr - dev_priv->dma_low) :
(hw_addr - dev_priv->dma_low));
}
/*
* How much does the command regulator lag behind?
*/
static uint32_t
via_cmdbuf_lag(drm_via_private_t *dev_priv)
{
uint32_t agp_base = dev_priv->dma_offset +
(uint32_t) dev_priv->agpAddr;
uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
return ((hw_addr <= dev_priv->dma_low) ?
(dev_priv->dma_low - hw_addr) :
(dev_priv->dma_wrap + dev_priv->dma_low - hw_addr));
}
/*
* Check that the given size fits in the buffer, otherwise wait.
*/
Rearrange things so that via_dma.c will compile with inline via_check_dma
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static inline int
via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
{
uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
uint32_t cur_addr, hw_addr, next_addr;
Lindent the via stuff so I can include it in kernel
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volatile uint32_t *hw_addr_ptr;
Rearrange things so that via_dma.c will compile with inline via_check_dma
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uint32_t count;
hw_addr_ptr = dev_priv->hw_addr_ptr;
Via updates. Fixed unlikely but possible uint32_t overflow in ring-buffer code. bumped patchlevel.
2004-10-12 12:46:26 -06:00
cur_addr = dev_priv->dma_low;
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
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next_addr = cur_addr + size;
count = 1000000;
Rearrange things so that via_dma.c will compile with inline via_check_dma
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do {
Via updates. Fixed unlikely but possible uint32_t overflow in ring-buffer code. bumped patchlevel.
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hw_addr = *hw_addr_ptr - agp_base;
Rearrange things so that via_dma.c will compile with inline via_check_dma
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if (count-- == 0) {
Via updates. Fixed unlikely but possible uint32_t overflow in ring-buffer code. bumped patchlevel.
2004-10-12 12:46:26 -06:00
DRM_ERROR("via_cmdbuf_wait timed out hw %x cur_addr %x next_addr %x\n",
hw_addr, cur_addr, next_addr);
Rearrange things so that via_dma.c will compile with inline via_check_dma
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return -1;
}
} while ((cur_addr < hw_addr) && (next_addr >= hw_addr));
return 0;
}
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
Rearrange things so that via_dma.c will compile with inline via_check_dma
2004-08-25 21:54:01 -06:00
/*
* Checks whether buffer head has reach the end. Rewind the ring buffer
* when necessary.
*
* Returns virtual pointer to ring buffer.
*/
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
Lindent the via stuff so I can include it in kernel
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static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
unsigned int size)
Rearrange things so that via_dma.c will compile with inline via_check_dma
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{
if ((dev_priv->dma_low + size + 0x400) > dev_priv->dma_high) {
via_cmdbuf_rewind(dev_priv);
}
if (via_cmdbuf_wait(dev_priv, size) != 0) {
return NULL;
}
Lindent the via stuff so I can include it in kernel
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return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
Rearrange things so that via_dma.c will compile with inline via_check_dma
2004-08-25 21:54:01 -06:00
}
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Lindent the via stuff so I can include it in kernel
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int via_dma_cleanup(drm_device_t * dev)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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{
if (dev->dev_private) {
Lindent the via stuff so I can include it in kernel
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drm_via_private_t *dev_priv =
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
(drm_via_private_t *) dev->dev_private;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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if (dev_priv->ring.virtual_start) {
via_cmdbuf_reset(dev_priv);
Lindent the via stuff so I can include it in kernel
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drm_core_ioremapfree(&dev_priv->ring.map, dev);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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dev_priv->ring.virtual_start = NULL;
}
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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}
return 0;
}
Lindent the via stuff so I can include it in kernel
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static int via_initialize(drm_device_t * dev,
drm_via_private_t * dev_priv,
drm_via_dma_init_t * init)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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{
if (!dev_priv || !dev_priv->mmio) {
DRM_ERROR("via_dma_init called before via_map_init\n");
return DRM_ERR(EFAULT);
}
if (dev_priv->ring.virtual_start != NULL) {
DRM_ERROR("%s called again without calling cleanup\n",
Lindent the via stuff so I can include it in kernel
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__FUNCTION__);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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return DRM_ERR(EFAULT);
}
dev_priv->ring.map.offset = dev->agp->base + init->offset;
dev_priv->ring.map.size = init->size;
dev_priv->ring.map.type = 0;
dev_priv->ring.map.flags = 0;
dev_priv->ring.map.mtrr = 0;
Lindent the via stuff so I can include it in kernel
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drm_core_ioremap(&dev_priv->ring.map, dev);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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if (dev_priv->ring.map.handle == NULL) {
via_dma_cleanup(dev);
DRM_ERROR("can not ioremap virtual address for"
Lindent the via stuff so I can include it in kernel
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" ring buffer\n");
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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return DRM_ERR(ENOMEM);
}
dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
dev_priv->dma_ptr = dev_priv->ring.virtual_start;
dev_priv->dma_low = 0;
dev_priv->dma_high = init->size;
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
dev_priv->dma_wrap = init->size;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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dev_priv->dma_offset = init->offset;
dev_priv->last_pause_ptr = NULL;
dev_priv->hw_addr_ptr = dev_priv->mmio->handle + init->reg_pause_addr;
via_cmdbuf_start(dev_priv);
return 0;
}
Lindent the via stuff so I can include it in kernel
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int via_dma_init(DRM_IOCTL_ARGS)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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{
DRM_DEVICE;
Lindent the via stuff so I can include it in kernel
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drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
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drm_via_dma_init_t init;
int retcode = 0;
Lindent the via stuff so I can include it in kernel
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DRM_COPY_FROM_USER_IOCTL(init, (drm_via_dma_init_t *) data,
sizeof(init));
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
switch (init.func) {
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
case VIA_INIT_DMA:
retcode = via_initialize(dev, dev_priv, &init);
break;
case VIA_CLEANUP_DMA:
retcode = via_dma_cleanup(dev);
break;
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
case VIA_DMA_INITIALIZED:
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
retcode = (dev_priv->ring.virtual_start != NULL) ? 0: DRM_ERR( EFAULT );
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
break;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
default:
retcode = DRM_ERR(EINVAL);
break;
}
return retcode;
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
static int via_dispatch_cmdbuffer(drm_device_t * dev, drm_via_cmdbuffer_t * cmd)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
drm_via_private_t *dev_priv;
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
uint32_t *vb;
Changed unsigned to uint32_t in some ioctl parameters. Introduced first rudimentary command verifier for dma buffers. Changed the decoder futex ioctl parameters. Bumped the via major version number.
2004-10-08 15:11:02 -06:00
int ret;
Security and optimization fixes for the via drm: 1. The command verifier was never initialized in the non-core source tree. 2. Check added that the AGP ring buffer has been initialized before accepting command buffer. 3. Free space check in the AGP buffer is moved to after command verification, which is more optimal in most cases.
2004-12-06 04:19:23 -07:00
dev_priv = (drm_via_private_t *) dev->dev_private;
if (dev_priv->ring.virtual_start == NULL) {
DRM_ERROR("%s called without initializing AGP ring buffer.\n",
__FUNCTION__);
return DRM_ERR(EFAULT);
}
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
if (cmd->size > pci_bufsiz && pci_bufsiz > 0) {
return DRM_ERR(ENOMEM);
}
if (DRM_COPY_FROM_USER(pci_buf, cmd->buf, cmd->size))
Fix copy_from_user return value ignored warning at via_dma.c:168.
2004-08-29 22:58:24 -06:00
return DRM_ERR(EFAULT);
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
/*
* Running this function on AGP memory is dead slow. Therefore
* we run it on a temporary cacheable system memory buffer and
* copy it to AGP memory when ready.
*/
Changed unsigned to uint32_t in some ioctl parameters. Introduced first rudimentary command verifier for dma buffers. Changed the decoder futex ioctl parameters. Bumped the via major version number.
2004-10-08 15:11:02 -06:00
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
if ((ret = via_verify_command_stream((uint32_t *)pci_buf, cmd->size, dev))) {
return ret;
}
Security and optimization fixes for the via drm: 1. The command verifier was never initialized in the non-core source tree. 2. Check added that the AGP ring buffer has been initialized before accepting command buffer. 3. Free space check in the AGP buffer is moved to after command verification, which is more optimal in most cases.
2004-12-06 04:19:23 -07:00
vb = via_check_dma(dev_priv, cmd->size);
if (vb == NULL) {
return DRM_ERR(EAGAIN);
}
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
memcpy(vb, pci_buf, cmd->size);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
dev_priv->dma_low += cmd->size;
via_cmdbuf_pause(dev_priv);
return 0;
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
static int via_quiescent(drm_device_t * dev)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
drm_via_private_t *dev_priv = dev->dev_private;
if (!via_wait_idle(dev_priv)) {
return DRM_ERR(EAGAIN);
}
return 0;
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
int via_flush_ioctl(DRM_IOCTL_ARGS)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
DRM_DEVICE;
Fixed bug in via_dma.c. The code didn't check that the lock was held by the caller. Just that it was held.
2004-11-03 06:37:37 -07:00
LOCK_TEST_WITH_RETURN( dev, filp );
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
return via_quiescent(dev);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
int via_cmdbuffer(DRM_IOCTL_ARGS)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
DRM_DEVICE;
drm_via_cmdbuffer_t cmdbuf;
int ret;
Fixed bug in via_dma.c. The code didn't check that the lock was held by the caller. Just that it was held.
2004-11-03 06:37:37 -07:00
LOCK_TEST_WITH_RETURN( dev, filp );
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data,
sizeof(cmdbuf));
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
DRM_DEBUG("via cmdbuffer, buf %p size %lu\n", cmdbuf.buf, cmdbuf.size);
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
ret = via_dispatch_cmdbuffer(dev, &cmdbuf);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
if (ret) {
return ret;
}
return 0;
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
static int via_parse_pci_cmdbuffer(drm_device_t * dev, const char *buf,
unsigned int size)
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
{
drm_via_private_t *dev_priv = dev->dev_private;
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
const uint32_t *regbuf = (const uint32_t *) buf;
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
const uint32_t *regend = regbuf + (size >> 2);
Changed unsigned to uint32_t in some ioctl parameters. Introduced first rudimentary command verifier for dma buffers. Changed the decoder futex ioctl parameters. Bumped the via major version number.
2004-10-08 15:11:02 -06:00
int ret;
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
int check_2d_cmd = 1;
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
if ((ret = via_verify_command_stream(regbuf, size, dev)))
Changed unsigned to uint32_t in some ioctl parameters. Introduced first rudimentary command verifier for dma buffers. Changed the decoder futex ioctl parameters. Bumped the via major version number.
2004-10-08 15:11:02 -06:00
return ret;
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
while (regbuf != regend) {
if ( *regbuf == HALCYON_HEADER2 ) {
regbuf++;
check_2d_cmd = ( *regbuf != HALCYON_SUB_ADDR0 );
VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *regbuf++);
} else if ( check_2d_cmd && ((*regbuf & HALCYON_HEADER1MASK) == HALCYON_HEADER1 )) {
register uint32_t addr = ( (*regbuf++ ) & ~HALCYON_HEADER1MASK) << 2;
VIA_WRITE( addr, *regbuf++ );
} else if ( ( *regbuf & HALCYON_FIREMASK ) == HALCYON_FIRECMD ) {
VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE, *regbuf++);
if ( ( regbuf != regend ) &&
((*regbuf & HALCYON_FIREMASK) == HALCYON_FIRECMD))
regbuf++;
if (( *regbuf & HALCYON_CMDBMASK ) != HC_ACMD_HCmdB )
check_2d_cmd = 1;
} else {
VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE , *regbuf++);
}
}
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
return 0;
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
static int via_dispatch_pci_cmdbuffer(drm_device_t * dev,
drm_via_cmdbuffer_t * cmd)
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
{
int ret;
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
if (cmd->size > pci_bufsiz && pci_bufsiz > 0) {
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
return DRM_ERR(ENOMEM);
Reworked PCI MMIO command buffer parser, and imported code from the Mesa driver. It can now handle the 3D OpenGL commands from the Mesa unichrome driver. Added vsync frequency detection support. This will be used in the future for XvMC and better frame timing. Bumped minor version number and driver date.
2004-11-27 15:55:31 -07:00
}
if (DRM_COPY_FROM_USER(pci_buf, cmd->buf, cmd->size))
return DRM_ERR(EFAULT);
ret = via_parse_pci_cmdbuffer(dev, pci_buf, cmd->size);
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
return ret;
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
int via_pci_cmdbuffer(DRM_IOCTL_ARGS)
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
{
DRM_DEVICE;
drm_via_cmdbuffer_t cmdbuf;
int ret;
Fixed bug in via_dma.c. The code didn't check that the lock was held by the caller. Just that it was held.
2004-11-03 06:37:37 -07:00
LOCK_TEST_WITH_RETURN( dev, filp );
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_via_cmdbuffer_t *) data,
sizeof(cmdbuf));
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
DRM_DEBUG("via_pci_cmdbuffer, buf %p size %lu\n", cmdbuf.buf,
cmdbuf.size);
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
ret = via_dispatch_pci_cmdbuffer(dev, &cmdbuf);
Added IOCTL for writing 2D DMA command buffers over PCI. Bumped minor version number.
2004-09-07 10:48:44 -06:00
if (ret) {
return ret;
}
return 0;
}
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
/************************************************************************/
#define CMDBUF_ALIGNMENT_SIZE (0x100)
#define CMDBUF_ALIGNMENT_MASK (0xff)
/* defines for VIA 3D registers */
#define VIA_REG_STATUS 0x400
#define VIA_REG_TRANSET 0x43C
#define VIA_REG_TRANSPACE 0x440
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
/* VIA_REG_STATUS(0x400): Engine Status */
#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */
#define VIA_2D_ENG_BUSY 0x00000001 /* 2D Engine is busy */
#define VIA_3D_ENG_BUSY 0x00000002 /* 3D Engine is busy */
#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
#define SetReg2DAGP(nReg, nData) { \
*((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
*((uint32_t *)(vb) + 1) = (nData); \
vb = ((uint32_t *)vb) + 2; \
dev_priv->dma_low +=8; \
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
uint32_t * vb, int qw_count)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
for (; qw_count > 0; --qw_count) {
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
return vb;
}
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
/*
* This function is used internally by ring buffer mangement code.
*
* Returns virtual pointer to ring buffer.
*/
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
/*
* Hooks a segment of data into the tail of the ring-buffer by
* modifying the pause address stored in the buffer itself. If
* the regulator has already paused, restart it.
*/
static int via_hook_segment(drm_via_private_t *dev_priv,
uint32_t pause_addr_hi, uint32_t pause_addr_lo,
int no_pci_fire)
{
int paused, count;
via_flush_write_combine();
while(! *(via_get_dma(dev_priv)-1));
*dev_priv->last_pause_ptr = pause_addr_lo;
via_flush_write_combine();
/*
* The below statement is inserted to really force the flush.
* Not sure it is needed.
*/
while(! *dev_priv->last_pause_ptr);
dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
paused = 0;
count = 3;
while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--);
if ((count < 1) && (count >= 0)) {
uint32_t rgtr, ptr;
rgtr = *(dev_priv->hw_addr_ptr);
ptr = ((char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) +
dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4 - 0x100;
if (rgtr <= ptr) {
DRM_ERROR("Command regulator\npaused at count %d, address %x, "
"while current pause address is %x.\n"
"Please mail this message to "
"<unichrome-devel@lists.sourceforge.net>\n",
count, rgtr, ptr);
}
}
if (paused && !no_pci_fire) {
VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
}
return paused;
}
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
int via_wait_idle(drm_via_private_t * dev_priv)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
int count = 10000000;
while (count-- && (VIA_READ(VIA_REG_STATUS) &
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
(VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY |
VIA_3D_ENG_BUSY))) ;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
return count;
}
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type,
uint32_t addr, uint32_t *cmd_addr_hi,
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
uint32_t *cmd_addr_lo,
int skip_wait)
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
{
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
uint32_t agp_base;
uint32_t cmd_addr, addr_lo, addr_hi;
uint32_t *vb;
uint32_t qw_pad_count;
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
if (!skip_wait)
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
via_cmdbuf_wait(dev_priv, 2*CMDBUF_ALIGNMENT_SIZE);
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
vb = via_get_dma(dev_priv);
VIA_OUT_RING_QW( HC_HEADER2 | ((VIA_REG_TRANSET >> 2) << 12) |
(VIA_REG_TRANSPACE >> 2), HC_ParaType_PreCR << 16);
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
qw_pad_count = (CMDBUF_ALIGNMENT_SIZE >> 3) -
((dev_priv->dma_low & CMDBUF_ALIGNMENT_MASK) >> 3);
cmd_addr = (addr) ? addr :
agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
addr_lo = ((HC_SubA_HAGPBpL << 24) | cmd_type |
(cmd_addr & 0xffffff));
addr_hi = ((HC_SubA_HAGPBpH << 24) | (cmd_addr >> 24));
vb = via_align_buffer(dev_priv, vb, qw_pad_count - 1);
VIA_OUT_RING_QW(*cmd_addr_hi = addr_hi,
*cmd_addr_lo = addr_lo);
return vb;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
static void via_cmdbuf_start(drm_via_private_t * dev_priv)
{
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
uint32_t pause_addr_lo, pause_addr_hi;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
uint32_t start_addr, start_addr_lo;
uint32_t end_addr, end_addr_lo;
uint32_t command;
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
uint32_t agp_base;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
dev_priv->dma_low = 0;
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
start_addr = agp_base;
end_addr = agp_base + dev_priv->dma_high;
start_addr_lo = ((HC_SubA_HAGPBstL << 24) | (start_addr & 0xFFFFFF));
end_addr_lo = ((HC_SubA_HAGPBendL << 24) | (end_addr & 0xFFFFFF));
command = ((HC_SubA_HAGPCMNT << 24) | (start_addr >> 24) |
Lindent the via stuff so I can include it in kernel
2004-10-09 05:12:24 -06:00
((end_addr & 0xff000000) >> 16));
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
dev_priv->last_pause_ptr =
via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0,
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
&pause_addr_hi, & pause_addr_lo, 1) - 1;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
via_flush_write_combine();
while(! *dev_priv->last_pause_ptr);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16));
VIA_WRITE(VIA_REG_TRANSPACE, command);
VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo);
VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo);
VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi);
VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo);
VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK);
}
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
{
uint32_t *vb = via_get_dma(dev_priv);
SetReg2DAGP(0x0C, (0 | (0 << 16)));
SetReg2DAGP(0x10, 0 | (0 << 16));
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000);
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
}
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
{
uint32_t agp_base;
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
uint32_t pause_addr_lo, pause_addr_hi;
uint32_t jump_addr_lo, jump_addr_hi;
volatile uint32_t *last_pause_ptr;
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
uint32_t dma_low_save1, dma_low_save2;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi,
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
&jump_addr_lo, 0);
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
dev_priv->dma_wrap = dev_priv->dma_low;
/*
* Wrap command buffer to the beginning.
*/
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
dev_priv->dma_low = 0;
if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) {
DRM_ERROR("via_cmdbuf_jump failed\n");
}
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
&pause_addr_lo, 0) -1;
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
&pause_addr_lo, 0);
*last_pause_ptr = pause_addr_lo;
dma_low_save1 = dev_priv->dma_low;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
/*
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
* Now, set a trap that will pause the regulator if it tries to rerun the old
* command buffer. (Which may happen if via_hook_segment detecs a command regulator pause
* and reissues the jump command over PCI, while the regulator has already taken the jump
* and actually paused at the current buffer end).
* There appears to be no other way to detect this condition, since the hw_addr_pointer
* does not seem to get updated immediately when a jump occurs.
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
*/
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
last_pause_ptr = via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
&pause_addr_lo, 0) -1;
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
&pause_addr_lo, 0);
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
*last_pause_ptr = pause_addr_lo;
dma_low_save2 = dev_priv->dma_low;
dev_priv->dma_low = dma_low_save1;
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0);
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
dev_priv->dma_low = dma_low_save2;
via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0);
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
}
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv)
{
Reworked the jump-code in via_dma.c. The command regulator now seems to pause correctly after a jump. Removed the debug message from within the interrupt handler of via_irq.c
2004-11-01 13:48:49 -07:00
via_cmdbuf_jump(dev_priv);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
{
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
uint32_t pause_addr_lo, pause_addr_hi;
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
Added 3D functionality to the via command verifier. Modified the via ring-buffer code somewhat to workaround hardware problems. Bumped via minor version number.
2004-12-03 16:03:36 -07:00
via_align_cmd(dev_priv, cmd_type, 0, &pause_addr_hi, &pause_addr_lo, 0);
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
via_hook_segment( dev_priv, pause_addr_hi, pause_addr_lo, 0);
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
}
Some stabilizing work to the DMA ring-buffer code. Temporarily replaced the rewind jump with a reinitialization. This makes the code stable on CLE266 and KM400.
2004-10-30 07:01:48 -06:00
This patch adds three new ioctl's to the VIA Unichrome/Pro DRM driver: DRM_IOCTL_VIA_DMA_INIT DRM_IOCTL_VIA_CMDBUFFER DRM_IOCTL_VIA_FLUSH The first ioctl sets up an area in AGP memory that will be used as the ring buffer. The second ioctl copies a command buffer from user space memory to the ring buffer. The third ioctl waits for engine idle until it returns. The motivation for this patch is to avoid the wait for engine idle call before each buffer flush in the current DRI driver. With this patch, the DRI driver can continue to flush its buffer as long as there is free space in the ring buffer. This patch adds an additional copy operation on the command buffer. This buffer copying is necessary to support multiple DRI clients rendering simultaneously. Otherwise, more CPU time will be spent in the busy loop waiting for engine idle between DRI context switch. Even in the single client case, the tradeoff is reasonable in comparision to the kernel call to check for free buffer space for the client to render directly to the ring buffer.
2004-08-23 19:44:37 -06:00
static void via_cmdbuf_pause(drm_via_private_t * dev_priv)
{
via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE);
}
static void via_cmdbuf_reset(drm_via_private_t * dev_priv)
{
via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP);
via_wait_idle(dev_priv);
}
VIA drm updates: 1. Improved security check of AGP texture adresses. 2. Hopefully last fix of ring-buffer jump oddities. 3. Added ioctl to check available space and command regulator lag in ring-buffer. This is needed for 3D application responsiveness.
2004-12-13 06:53:12 -07:00
/*
* User interface to the space and lag function.
*/
int
via_cmdbuf_size(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_via_cmdbuf_size_t d_siz;
int ret = 0;
uint32_t tmp_size, count;
drm_via_private_t *dev_priv;
DRM_DEBUG("via cmdbuf_size\n");
LOCK_TEST_WITH_RETURN( dev, filp );
dev_priv = (drm_via_private_t *) dev->dev_private;
if (dev_priv->ring.virtual_start == NULL) {
DRM_ERROR("%s called without initializing AGP ring buffer.\n",
__FUNCTION__);
return DRM_ERR(EFAULT);
}
DRM_COPY_FROM_USER_IOCTL(d_siz, (drm_via_cmdbuffer_t *) data,
sizeof(d_siz));
count = 1000000;
tmp_size = d_siz.size;
switch(d_siz.func) {
case VIA_CMDBUF_SPACE:
while (count-- && ((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz.size)) {
if (!d_siz.wait) {
break;
}
}
if (!count) {
DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
ret = DRM_ERR(EAGAIN);
}
break;
case VIA_CMDBUF_LAG:
while (count-- && ((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz.size)) {
if (!d_siz.wait) {
break;
}
}
if (!count) {
DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
ret = DRM_ERR(EAGAIN);
}
break;
default:
return DRM_ERR(EFAULT);
}
d_siz.size = tmp_size;
DRM_COPY_TO_USER_IOCTL((drm_via_cmdbuffer_t *) data, d_siz,
sizeof(d_siz));
return ret;
}