intel: Use atomic refcounters
As the target architecture for Intel GPUs is the x86, we can presume to have reasonable compiler support for Intel atomic intrinsics, i.e. gcc, and so use those in preference to pulling in a complicated mess of fragile assembly. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> [anholt: hand-resolved against my previous commit. This brings cairo-gl firefox-talos-gfx time from 65 seconds back down to 62 seconds.] Signed-off-by: Eric Anholt <eric@anholt.net>main
Chris Wilson
Eric Anholt
parent
0fb215ae31
commit
04495eeec2
17
configure.ac
17
configure.ac
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@ -146,6 +146,23 @@ if test "x$HAVE_LIBUDEV" = xyes; then
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fi
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AM_CONDITIONAL(HAVE_LIBUDEV, [test "x$HAVE_LIBUDEV" = xyes])
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# Check for atomic intrinsics
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AC_CACHE_CHECK([for native atomic primitives], drm_cv_atomic_primitives,
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[
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drm_cv_atomic_primitives="none"
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AC_TRY_LINK([
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int atomic_add(int i) { return __sync_fetch_and_add (&i, 1); }
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int atomic_cmpxchg(int i, int j, int k) { return __sync_val_compare_and_swap (&i, j, k); }
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], [],
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drm_cv_atomic_primitives="Intel"
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)
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])
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if test "x$drm_cv_atomic_primitives" = xIntel; then
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AC_DEFINE(HAVE_INTEL_ATOMIC_PRIMITIVES, 1,
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[Enable if your compiler supports the Intel __sync_* atomic primitives])
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fi
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AC_SUBST(WARN_CFLAGS)
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AC_OUTPUT([
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Makefile
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@ -35,6 +35,7 @@ libdrm_intel_la_LDFLAGS = -version-number 1:0:0 -no-undefined
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libdrm_intel_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@ @CLOCK_LIB@
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libdrm_intel_la_SOURCES = \
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intel_atomic.h \
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intel_bufmgr.c \
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intel_bufmgr_priv.h \
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intel_bufmgr_fake.c \
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@ -0,0 +1,59 @@
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/*
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* Copyright © 2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Chris Wilson <chris@chris-wilson.co.uk>
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*
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*/
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/**
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* @file intel_atomics.h
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*
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* Private definitions for atomic operations
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*/
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#ifndef INTEL_ATOMICS_H
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#define INTEL_ATOMICS_H
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#if HAVE_INTEL_ATOMIC_PRIMITIVES
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#define HAS_ATOMIC_OPS 1
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typedef struct { int atomic; } atomic_t;
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# define atomic_read(x) ((x)->atomic)
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# define atomic_set(x, val) ((x)->atomic = (val))
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# define atomic_inc(x) ((void) __sync_fetch_and_add (&(x)->atomic, 1))
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# define atomic_dec_and_test(x) (__sync_fetch_and_add (&(x)->atomic, -1) == 1)
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# define atomic_cmpxchg(x, oldv, newv) __sync_val_compare_and_swap (&(x)->atomic, oldv, newv)
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#endif
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#if ! HAS_ATOMIC_OPS
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#error libdrm-intel requires atomic operations, please define them for your CPU/compiler.
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#endif
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#endif
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@ -53,6 +53,7 @@
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#include "errno.h"
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#include "libdrm_lists.h"
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#include "intel_atomic.h"
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#include "intel_bufmgr.h"
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#include "intel_bufmgr_priv.h"
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#include "intel_chipset.h"
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@ -102,7 +103,7 @@ typedef struct _drm_intel_bufmgr_gem {
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struct _drm_intel_bo_gem {
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drm_intel_bo bo;
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int refcount;
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atomic_t refcount;
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/** Boolean whether the mmap ioctl has been called for this buffer yet. */
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uint32_t gem_handle;
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const char *name;
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@ -172,8 +173,6 @@ struct _drm_intel_bo_gem {
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int reloc_tree_fences;
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};
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static void drm_intel_gem_bo_reference_locked(drm_intel_bo *bo);
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static unsigned int
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drm_intel_gem_estimate_batch_space(drm_intel_bo **bo_array, int count);
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@ -188,6 +187,9 @@ static int
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drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t *tiling_mode,
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uint32_t stride);
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static void
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drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo);
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static void
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drm_intel_gem_bo_unreference(drm_intel_bo *bo);
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@ -237,6 +239,15 @@ static void drm_intel_gem_dump_validation_list(drm_intel_bufmgr_gem *bufmgr_gem)
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}
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}
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static void
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drm_intel_gem_bo_reference(drm_intel_bo *bo)
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{
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drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
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assert(atomic_read(&bo_gem->refcount) > 0);
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atomic_inc(&bo_gem->refcount);
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}
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/**
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* Adds the given buffer to the list of buffers to be validated (moved into the
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* appropriate memory type) with the next batch submission.
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@ -280,7 +291,7 @@ drm_intel_add_validate_buffer(drm_intel_bo *bo)
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bufmgr_gem->exec_objects[index].alignment = 0;
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bufmgr_gem->exec_objects[index].offset = 0;
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bufmgr_gem->exec_bos[index] = bo;
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drm_intel_gem_bo_reference_locked(bo);
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drm_intel_gem_bo_reference(bo);
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bufmgr_gem->exec_count++;
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}
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@ -436,7 +447,7 @@ retry:
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}
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bo_gem->name = name;
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bo_gem->refcount = 1;
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atomic_set(&bo_gem->refcount, 1);
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bo_gem->validate_index = -1;
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bo_gem->reloc_tree_size = bo_gem->bo.size;
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bo_gem->reloc_tree_fences = 0;
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@ -499,7 +510,7 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, const char *name,
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bo_gem->bo.virtual = NULL;
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bo_gem->bo.bufmgr = bufmgr;
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bo_gem->name = name;
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bo_gem->refcount = 1;
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atomic_set (&bo_gem->refcount, 1);
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bo_gem->validate_index = -1;
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bo_gem->gem_handle = open_arg.handle;
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bo_gem->global_name = handle;
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@ -524,27 +535,6 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr, const char *name,
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return &bo_gem->bo;
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}
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static void
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drm_intel_gem_bo_reference(drm_intel_bo *bo)
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{
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drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
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drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
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assert(bo_gem->refcount > 0);
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pthread_mutex_lock(&bufmgr_gem->lock);
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bo_gem->refcount++;
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pthread_mutex_unlock(&bufmgr_gem->lock);
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}
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static void
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drm_intel_gem_bo_reference_locked(drm_intel_bo *bo)
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{
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drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
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assert(bo_gem->refcount > 0);
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bo_gem->refcount++;
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}
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static void
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drm_intel_gem_bo_free(drm_intel_bo *bo)
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{
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@ -597,60 +587,70 @@ drm_intel_gem_cleanup_bo_cache(drm_intel_bufmgr_gem *bufmgr_gem, time_t time)
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}
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static void
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drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo)
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drm_intel_gem_bo_unreference_final(drm_intel_bo *bo)
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{
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drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
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drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
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struct drm_intel_gem_bo_bucket *bucket;
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uint32_t tiling_mode;
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assert(bo_gem->refcount > 0);
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if (--bo_gem->refcount == 0) {
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struct drm_intel_gem_bo_bucket *bucket;
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uint32_t tiling_mode;
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if (bo_gem->relocs != NULL) {
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int i;
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if (bo_gem->relocs != NULL) {
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int i;
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/* Unreference all the target buffers */
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for (i = 0; i < bo_gem->reloc_count; i++)
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drm_intel_gem_bo_unreference_locked(bo_gem->reloc_target_bo[i]);
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}
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DBG("bo_unreference final: %d (%s)\n",
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bo_gem->gem_handle, bo_gem->name);
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bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, bo->size);
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/* Put the buffer into our internal cache for reuse if we can. */
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tiling_mode = I915_TILING_NONE;
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if (bufmgr_gem->bo_reuse && bo_gem->reusable && bucket != NULL &&
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drm_intel_gem_bo_set_tiling(bo, &tiling_mode, 0) == 0)
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{
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struct timespec time;
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clock_gettime(CLOCK_MONOTONIC, &time);
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bo_gem->free_time = time.tv_sec;
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bo_gem->name = NULL;
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bo_gem->validate_index = -1;
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bo_gem->reloc_count = 0;
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DRMLISTADDTAIL(&bo_gem->head, &bucket->head);
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drm_intel_gem_bo_madvise(bufmgr_gem, bo_gem, I915_MADV_DONTNEED);
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drm_intel_gem_cleanup_bo_cache(bufmgr_gem, time.tv_sec);
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} else {
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drm_intel_gem_bo_free(bo);
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}
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/* Unreference all the target buffers */
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for (i = 0; i < bo_gem->reloc_count; i++)
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drm_intel_gem_bo_unreference_locked(bo_gem->reloc_target_bo[i]);
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}
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DBG("bo_unreference final: %d (%s)\n",
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bo_gem->gem_handle, bo_gem->name);
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bucket = drm_intel_gem_bo_bucket_for_size(bufmgr_gem, bo->size);
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/* Put the buffer into our internal cache for reuse if we can. */
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tiling_mode = I915_TILING_NONE;
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if (bufmgr_gem->bo_reuse && bo_gem->reusable && bucket != NULL &&
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drm_intel_gem_bo_set_tiling(bo, &tiling_mode, 0) == 0)
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{
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struct timespec time;
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clock_gettime(CLOCK_MONOTONIC, &time);
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bo_gem->free_time = time.tv_sec;
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bo_gem->name = NULL;
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bo_gem->validate_index = -1;
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bo_gem->reloc_count = 0;
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DRMLISTADDTAIL(&bo_gem->head, &bucket->head);
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drm_intel_gem_bo_madvise(bufmgr_gem, bo_gem, I915_MADV_DONTNEED);
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drm_intel_gem_cleanup_bo_cache(bufmgr_gem, time.tv_sec);
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} else {
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drm_intel_gem_bo_free(bo);
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}
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}
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static void
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drm_intel_gem_bo_unreference_locked(drm_intel_bo *bo)
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{
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drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
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assert(atomic_read(&bo_gem->refcount) > 0);
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if (atomic_dec_and_test (&bo_gem->refcount))
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drm_intel_gem_bo_unreference_final(bo);
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}
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static void
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drm_intel_gem_bo_unreference(drm_intel_bo *bo)
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{
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drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
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drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
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pthread_mutex_lock(&bufmgr_gem->lock);
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drm_intel_gem_bo_unreference_locked(bo);
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pthread_mutex_unlock(&bufmgr_gem->lock);
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assert(atomic_read(&bo_gem->refcount) > 0);
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if (atomic_dec_and_test (&bo_gem->refcount)) {
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drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
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pthread_mutex_lock(&bufmgr_gem->lock);
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drm_intel_gem_bo_unreference_final(bo);
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pthread_mutex_unlock(&bufmgr_gem->lock);
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}
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}
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static int
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@ -1017,7 +1017,7 @@ drm_intel_gem_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
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bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset;
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bo_gem->reloc_target_bo[bo_gem->reloc_count] = target_bo;
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drm_intel_gem_bo_reference_locked(target_bo);
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drm_intel_gem_bo_reference(target_bo);
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bo_gem->reloc_count++;
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