nouveau : nv1x fix strange corruption
that appears when running glxgears and nouveau demomain
parent
f863d23e01
commit
097db7a9b0
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@ -714,7 +714,7 @@ void nouveau_nv10_context_switch(struct drm_device *dev)
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next = dev_priv->fifos[chid];
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next = dev_priv->fifos[chid];
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if (!next) {
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if (!next) {
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DRM_DEBUG("Invalid next channel\n");
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DRM_ERROR("Invalid next channel\n");
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return;
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return;
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}
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}
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@ -722,7 +722,7 @@ void nouveau_nv10_context_switch(struct drm_device *dev)
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last = dev_priv->fifos[chid];
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last = dev_priv->fifos[chid];
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if (!last) {
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if (!last) {
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DRM_DEBUG("WARNING: Invalid last channel, switch to %x\n",
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DRM_INFO("WARNING: Invalid last channel, switch to %x\n",
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next->id);
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next->id);
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} else {
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} else {
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DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",
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DRM_DEBUG("NV: PGRAPH context switch interrupt channel %x -> %x\n",
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@ -827,6 +827,9 @@ void nv10_graph_destroy_context(struct nouveau_channel *chan)
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int chid;
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int chid;
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chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
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chid = (NV_READ(NV10_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
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/* This code seems to corrupt the 3D pipe, but blob seems to do similar things ????
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*/
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#if 0
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/* does this avoid a potential context switch while we are written graph
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/* does this avoid a potential context switch while we are written graph
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* reg, or we should mask graph interrupt ???
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* reg, or we should mask graph interrupt ???
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*/
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*/
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@ -838,7 +841,12 @@ void nv10_graph_destroy_context(struct nouveau_channel *chan)
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nv10_graph_create_context(chan);
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nv10_graph_create_context(chan);
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nv10_graph_load_context(chan);
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nv10_graph_load_context(chan);
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}
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}
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NV_WRITE(NV04_PGRAPH_FIFO,0x1);
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NV_WRITE(NV04_PGRAPH_FIFO, 0x1);
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#else
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if (chid == chan->id) {
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DRM_INFO("cleanning a channel with graph in current context\n");
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}
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#endif
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}
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}
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int nv10_graph_init(struct drm_device *dev) {
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int nv10_graph_init(struct drm_device *dev) {
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