nouveau: cleanups
parent
c1008104ad
commit
0a2ab1a900
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@ -55,7 +55,6 @@ nouveau_bo_fence_type(struct drm_buffer_object *bo,
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uint32_t *fclass, uint32_t *type)
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uint32_t *fclass, uint32_t *type)
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{
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{
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*fclass = 0;
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*fclass = 0;
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if (bo->mem.mask & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
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if (bo->mem.mask & (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE))
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*type = 3;
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*type = 3;
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else
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else
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@ -191,9 +190,8 @@ nouveau_bo_move_m2mf(struct drm_buffer_object *bo, int evict, int no_wait,
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page_count -= line_count;
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page_count -= line_count;
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}
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}
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return drm_bo_move_accel_cleanup(bo, evict, no_wait, 0,
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return drm_bo_move_accel_cleanup(bo, evict, no_wait, dchan->chan->id,
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DRM_FENCE_TYPE_EXE,
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DRM_FENCE_TYPE_EXE, 0, new_mem);
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0, new_mem);
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}
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}
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static int
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static int
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@ -54,13 +54,17 @@ nouveau_fence_emit(struct drm_device *dev, uint32_t class, uint32_t flags,
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DRM_DEBUG("class=%d, flags=0x%08x\n", class, flags);
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DRM_DEBUG("class=%d, flags=0x%08x\n", class, flags);
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/* We can't emit fences on client channels */
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/* We can't emit fences on client channels, update sequence number
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if (chan != dchan->chan)
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* and userspace will emit the fence
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return 0;
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*/
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*breadcrumb = ++chan->next_sequence;
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*breadcrumb = ++dchan->next_sequence;
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*native_type = DRM_FENCE_TYPE_EXE;
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*native_type = DRM_FENCE_TYPE_EXE;
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if (chan != dchan->chan) {
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DRM_DEBUG("user fence 0x%08x\n", *breadcrumb);
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return 0;
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}
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DRM_DEBUG("emit 0x%08x\n", *breadcrumb);
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_REF, 1);
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_SET_REF, 1);
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OUT_RING (*breadcrumb);
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OUT_RING (*breadcrumb);
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
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BEGIN_RING(NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
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@ -83,10 +87,13 @@ nouveau_fence_perform_flush(struct drm_device *dev, uint32_t class)
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pending_types = fc->pending_flush |
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pending_types = fc->pending_flush |
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((fc->pending_exe_flush) ? DRM_FENCE_TYPE_EXE : 0);
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((fc->pending_exe_flush) ? DRM_FENCE_TYPE_EXE : 0);
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DRM_DEBUG("pending: 0x%08x 0x%08x\n", pending_types,
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fc->pending_flush);
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if (pending_types) {
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if (pending_types) {
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uint32_t sequence = NV_READ(NV03_FIFO_REGS(class) + 0x48);
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uint32_t sequence = NV_READ(NV03_FIFO_REGS(class) + 0x48);
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DRM_DEBUG("got 0x%08x\n", sequence);
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drm_fence_handler(dev, class, sequence, pending_types, 0);
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drm_fence_handler(dev, class, sequence, pending_types, 0);
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}
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}
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}
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}
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@ -106,6 +106,9 @@ struct nouveau_channel
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/* mapping of the regs controling the fifo */
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/* mapping of the regs controling the fifo */
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drm_local_map_t *regs;
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drm_local_map_t *regs;
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/* Fencing */
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uint32_t next_sequence;
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/* DMA push buffer */
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/* DMA push buffer */
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struct nouveau_gpuobj_ref *pushbuf;
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struct nouveau_gpuobj_ref *pushbuf;
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struct mem_block *pushbuf_mem;
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struct mem_block *pushbuf_mem;
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@ -146,9 +149,6 @@ struct nouveau_drm_channel {
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/* Notifiers */
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/* Notifiers */
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uint32_t notify0_offset;
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uint32_t notify0_offset;
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/* Fences */
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uint32_t next_sequence;
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/* Buffer moves */
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/* Buffer moves */
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uint32_t m2mf_dma_source;
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uint32_t m2mf_dma_source;
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uint32_t m2mf_dma_destin;
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uint32_t m2mf_dma_destin;
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@ -115,7 +115,7 @@ nouveau_fifo_irq_handler(struct drm_device *dev)
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}
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}
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if (status) {
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if (status) {
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DRM_INFO("Unhandled PFIFO_INTR - 0x%8x\n", status);
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DRM_INFO("Unhandled PFIFO_INTR - 0x%08x\n", status);
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NV_WRITE(NV03_PFIFO_INTR_0, status);
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NV_WRITE(NV03_PFIFO_INTR_0, status);
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}
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}
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@ -395,7 +395,7 @@ nouveau_pgraph_irq_handler(struct drm_device *dev)
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}
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}
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if (status) {
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if (status) {
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DRM_INFO("Unhandled PGRAPH_INTR - 0x%8x\n", status);
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DRM_INFO("Unhandled PGRAPH_INTR - 0x%08x\n", status);
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NV_WRITE(NV03_PGRAPH_INTR, status);
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NV_WRITE(NV03_PGRAPH_INTR, status);
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}
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}
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