nouveau: split PFIFO/PGRAPH context creation
parent
9dbf322d26
commit
0afb3b518e
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@ -505,18 +505,16 @@ static int nouveau_fifo_alloc(drm_device_t* dev, int *chan_ret, DRMFILE filp)
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NV_WRITE(NV03_PFIFO_CACHE1_PUSH0, 0x00000000);
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NV_WRITE(NV04_PFIFO_CACHE1_PULL0, 0x00000000);
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/* Construct inital RAMFC for new channel */
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/* Create a graphics context for new channel */
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switch(dev_priv->card_type)
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{
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case NV_04:
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case NV_05:
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nv04_graph_context_create(dev, channel);
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nouveau_nv04_context_init(dev, channel);
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break;
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case NV_10:
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case NV_17:
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nv10_graph_context_create(dev, channel);
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nouveau_nv10_context_init(dev, channel);
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break;
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case NV_20:
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ret = nv20_graph_context_create(dev, channel);
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@ -524,7 +522,6 @@ static int nouveau_fifo_alloc(drm_device_t* dev, int *chan_ret, DRMFILE filp)
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nouveau_fifo_free(dev, channel);
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return ret;
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}
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nouveau_nv10_context_init(dev, channel);
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break;
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case NV_30:
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ret = nv30_graph_context_create(dev, channel);
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@ -532,18 +529,45 @@ static int nouveau_fifo_alloc(drm_device_t* dev, int *chan_ret, DRMFILE filp)
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nouveau_fifo_free(dev, channel);
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return ret;
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}
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nouveau_nv30_context_init(dev, channel);
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break;
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case NV_40:
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case NV_44:
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case NV_50:
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ret = nv40_graph_context_create(dev, channel);
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if (ret) {
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nouveau_fifo_free(dev, channel);
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return ret;
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}
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break;
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default:
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DRM_ERROR("grctx: unknown card type\n");
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nouveau_fifo_free(dev, channel);
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return DRM_ERR(EINVAL);
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}
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/* Construct inital RAMFC for new channel */
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switch (dev_priv->card_type) {
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case NV_04:
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case NV_05:
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nouveau_nv04_context_init(dev, channel);
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break;
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case NV_10:
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case NV_17:
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nouveau_nv10_context_init(dev, channel);
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break;
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case NV_20:
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nouveau_nv10_context_init(dev, channel);
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break;
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case NV_30:
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nouveau_nv30_context_init(dev, channel);
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break;
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case NV_40:
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case NV_44:
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nouveau_nv40_context_init(dev, channel);
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break;
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default:
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DRM_ERROR("fifoctx: unknown card type\n");
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nouveau_fifo_free(dev, channel);
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return DRM_ERR(EINVAL);
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}
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/* enable the fifo dma operation */
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