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drm
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cleanup patch from Adrian Bunk <bunk@stusta.de>

main
Dave Airlie 2005-02-01 11:08:31 +00:00
parent 1dd948f280
commit 0d6b7fcb79
21 changed files with 151 additions and 487 deletions
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61
shared-core/mga_dma.c
View File

@ -41,6 +41,8 @@
#define MGA_DEFAULT_USEC_TIMEOUT 10000
#define MGA_FREELIST_DEBUG 0
static int mga_do_cleanup_dma(drm_device_t * dev);
/* ================================================================
* Engine control
*/
@ -67,26 +69,7 @@ int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
return DRM_ERR(EBUSY);
}
int mga_do_dma_idle(drm_mga_private_t * dev_priv)
{
u32 status = 0;
int i;
DRM_DEBUG("\n");
for (i = 0; i < dev_priv->usec_timeout; i++) {
status = MGA_READ(MGA_STATUS) & MGA_DMA_IDLE_MASK;
if (status == MGA_ENDPRDMASTS)
return 0;
DRM_UDELAY(1);
}
#if MGA_DMA_DEBUG
DRM_ERROR("failed! status=0x%08x\n", status);
#endif
return DRM_ERR(EBUSY);
}
int mga_do_dma_reset(drm_mga_private_t * dev_priv)
static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_primary_buffer_t *primary = &dev_priv->prim;
@ -110,42 +93,6 @@ int mga_do_dma_reset(drm_mga_private_t * dev_priv)
return 0;
}
int mga_do_engine_reset(drm_mga_private_t * dev_priv)
{
DRM_DEBUG("\n");
/* Okay, so we've completely screwed up and locked the engine.
* How about we clean up after ourselves?
*/
MGA_WRITE(MGA_RST, MGA_SOFTRESET);
DRM_UDELAY(15); /* Wait at least 10 usecs */
MGA_WRITE(MGA_RST, 0);
/* Initialize the registers that get clobbered by the soft
* reset. Many of the core register values survive a reset,
* but the drawing registers are basically all gone.
*
* 3D clients should probably die after calling this. The X
* server should reset the engine state to known values.
*/
#if 0
MGA_WRITE(MGA_PRIMPTR,
virt_to_bus((void *)dev_priv->prim.status_page) |
MGA_PRIMPTREN0 | MGA_PRIMPTREN1);
#endif
MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
MGA_WRITE(MGA_IEN, MGA_SOFTRAPIEN);
/* The primary DMA stream should look like new right about now.
*/
mga_do_dma_reset(dev_priv);
/* This bad boy will never fail.
*/
return 0;
}
/* ================================================================
* Primary DMA stream
*/
@ -611,7 +558,7 @@ static int mga_do_init_dma(drm_device_t * dev, drm_mga_init_t * init)
return 0;
}
int mga_do_cleanup_dma(drm_device_t * dev)
static int mga_do_cleanup_dma(drm_device_t * dev)
{
DRM_DEBUG("\n");

13
shared-core/mga_drv.h
View File

@ -121,10 +121,6 @@ extern void mga_driver_pretakedown(drm_device_t * dev);
extern int mga_driver_dma_quiescent(drm_device_t * dev);
extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv);
extern int mga_do_dma_idle(drm_mga_private_t * dev_priv);
extern int mga_do_dma_reset(drm_mga_private_t * dev_priv);
extern int mga_do_engine_reset(drm_mga_private_t * dev_priv);
extern int mga_do_cleanup_dma(drm_device_t * dev);
extern void mga_do_dma_flush(drm_mga_private_t * dev_priv);
extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv);
@ -132,15 +128,6 @@ extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv);
extern int mga_freelist_put(drm_device_t * dev, drm_buf_t * buf);
/* mga_state.c */
extern int mga_dma_clear(DRM_IOCTL_ARGS);
extern int mga_dma_swap(DRM_IOCTL_ARGS);
extern int mga_dma_vertex(DRM_IOCTL_ARGS);
extern int mga_dma_indices(DRM_IOCTL_ARGS);
extern int mga_dma_iload(DRM_IOCTL_ARGS);
extern int mga_dma_blit(DRM_IOCTL_ARGS);
extern int mga_getparam(DRM_IOCTL_ARGS);
/* mga_warp.c */
extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv);
extern int mga_warp_init(drm_mga_private_t * dev_priv);

44
shared-core/mga_state.c
View File

@ -37,21 +37,6 @@
#include "mga_drm.h"
#include "mga_drv.h"
drm_ioctl_desc_t mga_ioctls[] = {
[DRM_IOCTL_NR(DRM_MGA_INIT)] = {mga_dma_init, 1, 1},
[DRM_IOCTL_NR(DRM_MGA_FLUSH)] = {mga_dma_flush, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_RESET)] = {mga_dma_reset, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_SWAP)] = {mga_dma_swap, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_CLEAR)] = {mga_dma_clear, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_VERTEX)] = {mga_dma_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_INDICES)] = {mga_dma_indices, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_ILOAD)] = {mga_dma_iload, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_BLIT)] = {mga_dma_blit, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_GETPARAM)] = {mga_getparam, 1, 0},
};
int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);
/* ================================================================
* DMA hardware state programming functions
*/
@ -879,7 +864,7 @@ static void mga_dma_dispatch_blit(drm_device_t * dev, drm_mga_blit_t * blit)
*
*/
int mga_dma_clear(DRM_IOCTL_ARGS)
static int mga_dma_clear(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private;
@ -905,7 +890,7 @@ int mga_dma_clear(DRM_IOCTL_ARGS)
return 0;
}
int mga_dma_swap(DRM_IOCTL_ARGS)
static int mga_dma_swap(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private;
@ -927,7 +912,7 @@ int mga_dma_swap(DRM_IOCTL_ARGS)
return 0;
}
int mga_dma_vertex(DRM_IOCTL_ARGS)
static int mga_dma_vertex(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private;
@ -967,7 +952,7 @@ int mga_dma_vertex(DRM_IOCTL_ARGS)
return 0;
}
int mga_dma_indices(DRM_IOCTL_ARGS)
static int mga_dma_indices(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private;
@ -1007,7 +992,7 @@ int mga_dma_indices(DRM_IOCTL_ARGS)
return 0;
}
int mga_dma_iload(DRM_IOCTL_ARGS)
static int mga_dma_iload(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_device_dma_t *dma = dev->dma;
@ -1051,7 +1036,7 @@ int mga_dma_iload(DRM_IOCTL_ARGS)
return 0;
}
int mga_dma_blit(DRM_IOCTL_ARGS)
static int mga_dma_blit(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private;
@ -1081,7 +1066,7 @@ int mga_dma_blit(DRM_IOCTL_ARGS)
return 0;
}
int mga_getparam(DRM_IOCTL_ARGS)
static int mga_getparam(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_mga_private_t *dev_priv = dev->dev_private;
@ -1113,3 +1098,18 @@ int mga_getparam(DRM_IOCTL_ARGS)
return 0;
}
drm_ioctl_desc_t mga_ioctls[] = {
[DRM_IOCTL_NR(DRM_MGA_INIT)] = {mga_dma_init, 1, 1},
[DRM_IOCTL_NR(DRM_MGA_FLUSH)] = {mga_dma_flush, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_RESET)] = {mga_dma_reset, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_SWAP)] = {mga_dma_swap, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_CLEAR)] = {mga_dma_clear, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_VERTEX)] = {mga_dma_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_INDICES)] = {mga_dma_indices, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_ILOAD)] = {mga_dma_iload, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_BLIT)] = {mga_dma_blit, 1, 0},
[DRM_IOCTL_NR(DRM_MGA_GETPARAM)] = {mga_getparam, 1, 0},
};
int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);

4
shared-core/r128_cce.c
View File

@ -80,7 +80,7 @@ static u32 r128_cce_microcode[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
int R128_READ_PLL(drm_device_t * dev, int addr)
static int R128_READ_PLL(drm_device_t * dev, int addr)
{
drm_r128_private_t *dev_priv = dev->dev_private;
@ -808,7 +808,7 @@ static int r128_freelist_init(drm_device_t * dev)
}
#endif
drm_buf_t *r128_freelist_get(drm_device_t * dev)
static drm_buf_t *r128_freelist_get(drm_device_t * dev)
{
drm_device_dma_t *dma = dev->dma;
drm_r128_private_t *dev_priv = dev->dev_private;

22
shared-core/r128_drv.h
View File

@ -42,6 +42,12 @@
#define DRIVER_DESC "ATI Rage 128"
#define DRIVER_DATE "20030725"
/* Interface history:
*
* ?? - ??
* 2.4 - Add support for ycbcr textures (no new ioctls)
* 2.5 - Add FLIP ioctl, disable FULLSCREEN.
*/
#define DRIVER_MAJOR 2
#define DRIVER_MINOR 5
#define DRIVER_PATCHLEVEL 0
@ -132,27 +138,13 @@ extern int r128_cce_idle(DRM_IOCTL_ARGS);
extern int r128_engine_reset(DRM_IOCTL_ARGS);
extern int r128_fullscreen(DRM_IOCTL_ARGS);
extern int r128_cce_buffers(DRM_IOCTL_ARGS);
extern int r128_getparam(DRM_IOCTL_ARGS);
extern void r128_freelist_reset(drm_device_t * dev);
extern drm_buf_t *r128_freelist_get(drm_device_t * dev);
extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n);
extern int r128_do_cce_idle(drm_r128_private_t * dev_priv);
extern int r128_do_cleanup_cce(drm_device_t * dev);
extern int r128_do_cleanup_pageflip(drm_device_t * dev);
/* r128_state.c */
extern int r128_cce_clear(DRM_IOCTL_ARGS);
extern int r128_cce_swap(DRM_IOCTL_ARGS);
extern int r128_cce_flip(DRM_IOCTL_ARGS);
extern int r128_cce_vertex(DRM_IOCTL_ARGS);
extern int r128_cce_indices(DRM_IOCTL_ARGS);
extern int r128_cce_blit(DRM_IOCTL_ARGS);
extern int r128_cce_depth(DRM_IOCTL_ARGS);
extern int r128_cce_stipple(DRM_IOCTL_ARGS);
extern int r128_cce_indirect(DRM_IOCTL_ARGS);
extern int r128_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
@ -397,8 +389,6 @@ do { \
R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
} while (0)
extern int R128_READ_PLL(drm_device_t * dev, int addr);
#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
((n) << 16) | ((reg) >> 2))
#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \

70
shared-core/r128_state.c
View File

@ -32,34 +32,6 @@
#include "r128_drm.h"
#include "r128_drv.h"
/* Interface history:
*
* ?? - ??
* 2.4 - Add support for ycbcr textures (no new ioctls)
* 2.5 - Add FLIP ioctl, disable FULLSCREEN.
*/
drm_ioctl_desc_t r128_ioctls[] = {
[DRM_IOCTL_NR(DRM_R128_INIT)] = {r128_cce_init, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_START)] = {r128_cce_start, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = {r128_cce_stop, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = {r128_cce_reset, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = {r128_cce_idle, 1, 0},
[DRM_IOCTL_NR(DRM_R128_RESET)] = {r128_engine_reset, 1, 0},
[DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = {r128_fullscreen, 1, 0},
[DRM_IOCTL_NR(DRM_R128_SWAP)] = {r128_cce_swap, 1, 0},
[DRM_IOCTL_NR(DRM_R128_FLIP)] = {r128_cce_flip, 1, 0},
[DRM_IOCTL_NR(DRM_R128_CLEAR)] = {r128_cce_clear, 1, 0},
[DRM_IOCTL_NR(DRM_R128_VERTEX)] = {r128_cce_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_R128_INDICES)] = {r128_cce_indices, 1, 0},
[DRM_IOCTL_NR(DRM_R128_BLIT)] = {r128_cce_blit, 1, 0},
[DRM_IOCTL_NR(DRM_R128_DEPTH)] = {r128_cce_depth, 1, 0},
[DRM_IOCTL_NR(DRM_R128_STIPPLE)] = {r128_cce_stipple, 1, 0},
[DRM_IOCTL_NR(DRM_R128_INDIRECT)] = {r128_cce_indirect, 1, 1},
[DRM_IOCTL_NR(DRM_R128_GETPARAM)] = {r128_getparam, 1, 0},
};
int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
/* ================================================================
* CCE hardware state programming functions
*/
@ -1268,7 +1240,7 @@ static void r128_cce_dispatch_stipple(drm_device_t * dev, u32 * stipple)
* IOCTL functions
*/
int r128_cce_clear(DRM_IOCTL_ARGS)
static int r128_cce_clear(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1336,7 +1308,7 @@ int r128_do_cleanup_pageflip(drm_device_t * dev)
* They can & should be intermixed to support multiple 3d windows.
*/
int r128_cce_flip(DRM_IOCTL_ARGS)
static int r128_cce_flip(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1355,7 +1327,7 @@ int r128_cce_flip(DRM_IOCTL_ARGS)
return 0;
}
int r128_cce_swap(DRM_IOCTL_ARGS)
static int r128_cce_swap(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1377,7 +1349,7 @@ int r128_cce_swap(DRM_IOCTL_ARGS)
return 0;
}
int r128_cce_vertex(DRM_IOCTL_ARGS)
static int r128_cce_vertex(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1436,7 +1408,7 @@ int r128_cce_vertex(DRM_IOCTL_ARGS)
return 0;
}
int r128_cce_indices(DRM_IOCTL_ARGS)
static int r128_cce_indices(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1507,7 +1479,7 @@ int r128_cce_indices(DRM_IOCTL_ARGS)
return 0;
}
int r128_cce_blit(DRM_IOCTL_ARGS)
static int r128_cce_blit(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_device_dma_t *dma = dev->dma;
@ -1537,7 +1509,7 @@ int r128_cce_blit(DRM_IOCTL_ARGS)
return ret;
}
int r128_cce_depth(DRM_IOCTL_ARGS)
static int r128_cce_depth(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1567,7 +1539,7 @@ int r128_cce_depth(DRM_IOCTL_ARGS)
return ret;
}
int r128_cce_stipple(DRM_IOCTL_ARGS)
static int r128_cce_stipple(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1590,7 +1562,7 @@ int r128_cce_stipple(DRM_IOCTL_ARGS)
return 0;
}
int r128_cce_indirect(DRM_IOCTL_ARGS)
static int r128_cce_indirect(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1665,7 +1637,7 @@ int r128_cce_indirect(DRM_IOCTL_ARGS)
return 0;
}
int r128_getparam(DRM_IOCTL_ARGS)
static int r128_getparam(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
@ -1712,3 +1684,25 @@ void r128_driver_pretakedown(drm_device_t * dev)
{
r128_do_cleanup_cce(dev);
}
drm_ioctl_desc_t r128_ioctls[] = {
[DRM_IOCTL_NR(DRM_R128_INIT)] = {r128_cce_init, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_START)] = {r128_cce_start, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = {r128_cce_stop, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = {r128_cce_reset, 1, 1},
[DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = {r128_cce_idle, 1, 0},
[DRM_IOCTL_NR(DRM_R128_RESET)] = {r128_engine_reset, 1, 0},
[DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = {r128_fullscreen, 1, 0},
[DRM_IOCTL_NR(DRM_R128_SWAP)] = {r128_cce_swap, 1, 0},
[DRM_IOCTL_NR(DRM_R128_FLIP)] = {r128_cce_flip, 1, 0},
[DRM_IOCTL_NR(DRM_R128_CLEAR)] = {r128_cce_clear, 1, 0},
[DRM_IOCTL_NR(DRM_R128_VERTEX)] = {r128_cce_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_R128_INDICES)] = {r128_cce_indices, 1, 0},
[DRM_IOCTL_NR(DRM_R128_BLIT)] = {r128_cce_blit, 1, 0},
[DRM_IOCTL_NR(DRM_R128_DEPTH)] = {r128_cce_depth, 1, 0},
[DRM_IOCTL_NR(DRM_R128_STIPPLE)] = {r128_cce_stipple, 1, 0},
[DRM_IOCTL_NR(DRM_R128_INDIRECT)] = {r128_cce_indirect, 1, 1},
[DRM_IOCTL_NR(DRM_R128_GETPARAM)] = {r128_getparam, 1, 0},
};
int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);

6
shared-core/radeon_cp.c
View File

@ -35,6 +35,8 @@
#define RADEON_FIFO_DEBUG 0
static int radeon_do_cleanup_cp(drm_device_t * dev);
/* CP microcode (from ATI) */
static u32 R200_cp_microcode[][2] = {
{0x21007000, 0000000000},
@ -813,7 +815,7 @@ static u32 R300_cp_microcode[][2] = {
{ 0000000000, 0000000000 },
};
int RADEON_READ_PLL(drm_device_t * dev, int addr)
static int RADEON_READ_PLL(drm_device_t * dev, int addr)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -1515,7 +1517,7 @@ static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
return 0;
}
int radeon_do_cleanup_cp(drm_device_t * dev)
static int radeon_do_cleanup_cp(drm_device_t * dev)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG("\n");

23
shared-core/radeon_drv.h
View File

@ -290,39 +290,17 @@ extern drm_buf_t *radeon_freelist_get(drm_device_t * dev);
extern int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n);
extern int radeon_do_cp_idle(drm_radeon_private_t * dev_priv);
extern int radeon_do_cleanup_cp(drm_device_t * dev);
extern int radeon_do_cleanup_pageflip(drm_device_t * dev);
/* radeon_state.c */
extern int radeon_cp_clear(DRM_IOCTL_ARGS);
extern int radeon_cp_swap(DRM_IOCTL_ARGS);
extern int radeon_cp_vertex(DRM_IOCTL_ARGS);
extern int radeon_cp_indices(DRM_IOCTL_ARGS);
extern int radeon_cp_texture(DRM_IOCTL_ARGS);
extern int radeon_cp_stipple(DRM_IOCTL_ARGS);
extern int radeon_cp_indirect(DRM_IOCTL_ARGS);
extern int radeon_cp_vertex2(DRM_IOCTL_ARGS);
extern int radeon_cp_cmdbuf(DRM_IOCTL_ARGS);
extern int radeon_cp_getparam(DRM_IOCTL_ARGS);
extern int radeon_cp_setparam(DRM_IOCTL_ARGS);
extern int radeon_cp_flip(DRM_IOCTL_ARGS);
extern int radeon_mem_alloc(DRM_IOCTL_ARGS);
extern int radeon_mem_free(DRM_IOCTL_ARGS);
extern int radeon_mem_init_heap(DRM_IOCTL_ARGS);
extern void radeon_mem_takedown(struct mem_block **heap);
extern void radeon_mem_release(DRMFILE filp, struct mem_block *heap);
extern int radeon_surface_alloc(DRM_IOCTL_ARGS);
extern int radeon_surface_free(DRM_IOCTL_ARGS);
/* radeon_irq.c */
extern int radeon_irq_emit(DRM_IOCTL_ARGS);
extern int radeon_irq_wait(DRM_IOCTL_ARGS);
extern int radeon_emit_and_wait_irq(drm_device_t * dev);
extern int radeon_wait_irq(drm_device_t * dev, int swi_nr);
extern int radeon_emit_irq(drm_device_t * dev);
extern void radeon_do_release(drm_device_t * dev);
extern int radeon_driver_vblank_wait(drm_device_t * dev,
unsigned int *sequence);
@ -864,7 +842,6 @@ do { \
RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \
} while (0)
extern int RADEON_READ_PLL(drm_device_t * dev, int addr);
extern int radeon_preinit(struct drm_device *dev, unsigned long flags);
extern int radeon_postcleanup(struct drm_device *dev);

9
shared-core/radeon_irq.c
View File

@ -93,7 +93,7 @@ static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv)
RADEON_WRITE(RADEON_GEN_INT_STATUS, tmp);
}
int radeon_emit_irq(drm_device_t * dev)
static int radeon_emit_irq(drm_device_t * dev)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
unsigned int ret;
@ -111,7 +111,7 @@ int radeon_emit_irq(drm_device_t * dev)
return ret;
}
int radeon_wait_irq(drm_device_t * dev, int swi_nr)
static int radeon_wait_irq(drm_device_t * dev, int swi_nr)
{
drm_radeon_private_t *dev_priv =
(drm_radeon_private_t *) dev->dev_private;
@ -133,11 +133,6 @@ int radeon_wait_irq(drm_device_t * dev, int swi_nr)
return ret;
}
int radeon_emit_and_wait_irq(drm_device_t * dev)
{
return radeon_wait_irq(dev, radeon_emit_irq(dev));
}
int radeon_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
{
drm_radeon_private_t *dev_priv =

95
shared-core/radeon_state.c
View File

@ -33,39 +33,6 @@
#include "radeon_drm.h"
#include "radeon_drv.h"
drm_ioctl_desc_t radeon_ioctls[] = {
[DRM_IOCTL_NR(DRM_RADEON_CP_INIT)] = {radeon_cp_init, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_START)] = {radeon_cp_start, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_STOP)] = {radeon_cp_stop, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_RESET)] = {radeon_cp_reset, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_IDLE)] = {radeon_cp_idle, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_CP_RESUME)] = {radeon_cp_resume, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_RESET)] = {radeon_engine_reset, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_FULLSCREEN)] = {radeon_fullscreen, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SWAP)] = {radeon_cp_swap, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_CLEAR)] = {radeon_cp_clear, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_VERTEX)] = {radeon_cp_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_INDICES)] = {radeon_cp_indices, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_TEXTURE)] = {radeon_cp_texture, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_STIPPLE)] = {radeon_cp_stipple, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_INDIRECT)] = {radeon_cp_indirect, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_VERTEX2)] = {radeon_cp_vertex2, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_CMDBUF)] = {radeon_cp_cmdbuf, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_GETPARAM)] = {radeon_cp_getparam, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_FLIP)] = {radeon_cp_flip, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_ALLOC)] = {radeon_mem_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_FREE)] = {radeon_mem_free, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_INIT_HEAP)] = {radeon_mem_init_heap, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_IRQ_EMIT)] = {radeon_irq_emit, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_IRQ_WAIT)] = {radeon_irq_wait, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SETPARAM)] = {radeon_cp_setparam, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SURF_ALLOC)] = {radeon_surface_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SURF_FREE)] = {radeon_surface_free, 1, 0}
};
int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
/* ================================================================
* Helper functions for client state checking and fixup
*/
@ -1870,7 +1837,7 @@ static void radeon_surfaces_release(DRMFILE filp, drm_radeon_private_t *dev_priv
* IOCTL functions
*/
int radeon_surface_alloc(DRM_IOCTL_ARGS)
static int radeon_surface_alloc(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -1890,7 +1857,7 @@ int radeon_surface_alloc(DRM_IOCTL_ARGS)
return 0;
}
int radeon_surface_free(DRM_IOCTL_ARGS)
static int radeon_surface_free(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -1910,7 +1877,7 @@ int radeon_surface_free(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_clear(DRM_IOCTL_ARGS)
static int radeon_cp_clear(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -1968,7 +1935,7 @@ static int radeon_do_init_pageflip(drm_device_t * dev)
/* Called whenever a client dies, from drm_release.
* NOTE: Lock isn't necessarily held when this is called!
*/
int radeon_do_cleanup_pageflip(drm_device_t * dev)
static int radeon_do_cleanup_pageflip(drm_device_t * dev)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG("\n");
@ -1983,7 +1950,7 @@ int radeon_do_cleanup_pageflip(drm_device_t * dev)
/* Swapping and flipping are different operations, need different ioctls.
* They can & should be intermixed to support multiple 3d windows.
*/
int radeon_cp_flip(DRM_IOCTL_ARGS)
static int radeon_cp_flip(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2002,7 +1969,7 @@ int radeon_cp_flip(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_swap(DRM_IOCTL_ARGS)
static int radeon_cp_swap(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2023,7 +1990,7 @@ int radeon_cp_swap(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_vertex(DRM_IOCTL_ARGS)
static int radeon_cp_vertex(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2111,7 +2078,7 @@ int radeon_cp_vertex(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_indices(DRM_IOCTL_ARGS)
static int radeon_cp_indices(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2210,7 +2177,7 @@ int radeon_cp_indices(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_texture(DRM_IOCTL_ARGS)
static int radeon_cp_texture(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2242,7 +2209,7 @@ int radeon_cp_texture(DRM_IOCTL_ARGS)
return ret;
}
int radeon_cp_stipple(DRM_IOCTL_ARGS)
static int radeon_cp_stipple(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2265,7 +2232,7 @@ int radeon_cp_stipple(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_indirect(DRM_IOCTL_ARGS)
static int radeon_cp_indirect(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2339,7 +2306,7 @@ int radeon_cp_indirect(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_vertex2(DRM_IOCTL_ARGS)
static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2665,7 +2632,7 @@ static int radeon_emit_wait(drm_device_t * dev, int flags)
return 0;
}
int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2803,7 +2770,7 @@ int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_getparam(DRM_IOCTL_ARGS)
static int radeon_cp_getparam(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2877,7 +2844,7 @@ int radeon_cp_getparam(DRM_IOCTL_ARGS)
return 0;
}
int radeon_cp_setparam(DRM_IOCTL_ARGS)
static int radeon_cp_setparam(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_radeon_private_t *dev_priv = dev->dev_private;
@ -2976,3 +2943,35 @@ void radeon_driver_free_filp_priv(drm_device_t * dev, drm_file_t * filp_priv)
drm_free(radeon_priv, sizeof(*radeon_priv), DRM_MEM_FILES);
}
drm_ioctl_desc_t radeon_ioctls[] = {
[DRM_IOCTL_NR(DRM_RADEON_CP_INIT)] = {radeon_cp_init, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_START)] = {radeon_cp_start, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_STOP)] = {radeon_cp_stop, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_RESET)] = {radeon_cp_reset, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_CP_IDLE)] = {radeon_cp_idle, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_CP_RESUME)] = {radeon_cp_resume, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_RESET)] = {radeon_engine_reset, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_FULLSCREEN)] = {radeon_fullscreen, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SWAP)] = {radeon_cp_swap, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_CLEAR)] = {radeon_cp_clear, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_VERTEX)] = {radeon_cp_vertex, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_INDICES)] = {radeon_cp_indices, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_TEXTURE)] = {radeon_cp_texture, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_STIPPLE)] = {radeon_cp_stipple, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_INDIRECT)] = {radeon_cp_indirect, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_VERTEX2)] = {radeon_cp_vertex2, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_CMDBUF)] = {radeon_cp_cmdbuf, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_GETPARAM)] = {radeon_cp_getparam, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_FLIP)] = {radeon_cp_flip, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_ALLOC)] = {radeon_mem_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_FREE)] = {radeon_mem_free, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_INIT_HEAP)] = {radeon_mem_init_heap, 1, 1},
[DRM_IOCTL_NR(DRM_RADEON_IRQ_EMIT)] = {radeon_irq_emit, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_IRQ_WAIT)] = {radeon_irq_wait, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SETPARAM)] = {radeon_cp_setparam, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SURF_ALLOC)] = {radeon_surface_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_RADEON_SURF_FREE)] = {radeon_surface_free, 1, 0}
};
int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);

7
shared-core/sis_drv.h
View File

@ -46,13 +46,6 @@ typedef struct drm_sis_private {
memHeap_t *FBHeap;
} drm_sis_private_t;
extern int sis_fb_alloc(DRM_IOCTL_ARGS);
extern int sis_fb_free(DRM_IOCTL_ARGS);
extern int sis_ioctl_agp_init(DRM_IOCTL_ARGS);
extern int sis_ioctl_agp_alloc(DRM_IOCTL_ARGS);
extern int sis_ioctl_agp_free(DRM_IOCTL_ARGS);
extern int sis_fb_init(DRM_IOCTL_ARGS);
extern int sis_init_context(drm_device_t * dev, int context);
extern int sis_final_context(drm_device_t * dev, int context);

83
shared-core/sis_ds.c
View File

@ -193,30 +193,6 @@ int mmBlockInHeap(memHeap_t * heap, PMemBlock b)
return 0;
}
/* Kludgey workaround for existing i810 server. Remove soon.
*/
memHeap_t *mmAddRange(memHeap_t * heap, int ofs, int size)
{
PMemBlock blocks;
blocks = (TMemBlock *) drm_calloc(2, sizeof(TMemBlock), DRM_MEM_DRIVER);
if (blocks != NULL) {
blocks[0].size = size;
blocks[0].free = 1;
blocks[0].ofs = ofs;
blocks[0].next = &blocks[1];
/* Discontinuity - stops JoinBlock from trying to join
* non-adjacent ranges.
*/
blocks[1].size = 0;
blocks[1].free = 0;
blocks[1].ofs = ofs + size;
blocks[1].next = (PMemBlock) heap;
return (memHeap_t *) blocks;
} else
return heap;
}
static TMemBlock *SliceBlock(TMemBlock * p,
int startofs, int size,
int reserved, int alignment)
@ -321,62 +297,3 @@ int mmFreeMem(PMemBlock b)
Join2Blocks(prev);
return 0;
}
int mmReserveMem(memHeap_t * heap, int offset, int size)
{
int endofs;
TMemBlock *p;
if (heap == NULL || size <= 0)
return -1;
endofs = offset + size;
p = (TMemBlock *) heap;
while (p && p->ofs <= offset) {
if (ISFREE(p) && endofs <= (p->ofs + p->size)) {
SliceBlock(p, offset, size, 1, 1);
return 0;
}
p = p->next;
}
return -1;
}
int mmFreeReserved(memHeap_t * heap, int offset)
{
TMemBlock *p, *prev;
if (heap == NULL)
return -1;
p = (TMemBlock *) heap;
prev = NULL;
while (p != NULL && p->ofs != offset) {
prev = p;
p = p->next;
}
if (p == NULL || !p->reserved)
return -1;
p->free = 1;
p->reserved = 0;
Join2Blocks(p);
if (prev != NULL)
Join2Blocks(prev);
return 0;
}
void mmDestroy(memHeap_t * heap)
{
TMemBlock *p, *q;
if (heap == NULL)
return;
p = (TMemBlock *) heap;
while (p != NULL) {
q = p->next;
drm_free(p, sizeof(TMemBlock), DRM_MEM_DRIVER);
p = q;
}
}

17
shared-core/sis_ds.h
View File

@ -115,8 +115,6 @@ static __inline__ void mmMarkReserved(PMemBlock b)
*/
memHeap_t *mmInit(int ofs, int size);
memHeap_t *mmAddRange(memHeap_t * heap, int ofs, int size);
/*
* Allocate 'size' bytes with 2^align2 bytes alignment,
* restrict the search to free memory after 'startSearch'
@ -141,21 +139,6 @@ int mmBlockInHeap(PMemBlock heap, PMemBlock b);
*/
int mmFreeMem(PMemBlock b);
/*
* Reserve 'size' bytes block start at offset
* This is used to prevent allocation of memory already used
* by the X server for the front buffer, pixmaps, and cursor
* input: size, offset
* output: 0 if OK, -1 if error
*/
int mmReserveMem(memHeap_t * heap, int offset, int size);
int mmFreeReserved(memHeap_t * heap, int offset);
/*
* destroy MM
*/
void mmDestroy(memHeap_t * mmInit);
/* For debuging purpose. */
void mmDumpMemInfo(memHeap_t * mmInit);

40
shared-core/sis_mm.c
View File

@ -40,17 +40,6 @@
#include "sis_drv.h"
#include "sis_ds.h"
drm_ioctl_desc_t sis_ioctls[] = {
[DRM_IOCTL_NR(DRM_SIS_FB_ALLOC)] = {sis_fb_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_FB_FREE)] = {sis_fb_free, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_AGP_INIT)] = {sis_ioctl_agp_init, 1, 1},
[DRM_IOCTL_NR(DRM_SIS_AGP_ALLOC)] = {sis_ioctl_agp_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_AGP_FREE)] = {sis_ioctl_agp_free, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_FB_INIT)] = {sis_fb_init, 1, 1}
};
int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
#define MAX_CONTEXT 100
#define VIDEO_TYPE 0
#define AGP_TYPE 1
@ -92,12 +81,12 @@ static int del_alloc_set(int context, int type, unsigned int val)
/* fb management via fb device */
#if defined(__linux__) && defined(CONFIG_FB_SIS)
int sis_fb_init(DRM_IOCTL_ARGS)
static int sis_fb_init(DRM_IOCTL_ARGS)
{
return 0;
}
int sis_fb_alloc(DRM_IOCTL_ARGS)
static int sis_fb_alloc(DRM_IOCTL_ARGS)
{
drm_sis_mem_t fb;
struct sis_memreq req;
@ -130,7 +119,7 @@ int sis_fb_alloc(DRM_IOCTL_ARGS)
return retval;
}
int sis_fb_free(DRM_IOCTL_ARGS)
static int sis_fb_free(DRM_IOCTL_ARGS)
{
drm_sis_mem_t fb;
int retval = 0;
@ -161,7 +150,7 @@ int sis_fb_free(DRM_IOCTL_ARGS)
* X driver/sisfb HW- Command-
* framebuffer memory DRI heap Cursor queue
*/
int sis_fb_init(DRM_IOCTL_ARGS)
static int sis_fb_init(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private;
@ -187,7 +176,7 @@ int sis_fb_init(DRM_IOCTL_ARGS)
return 0;
}
int sis_fb_alloc(DRM_IOCTL_ARGS)
static int sis_fb_alloc(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private;
@ -224,7 +213,7 @@ int sis_fb_alloc(DRM_IOCTL_ARGS)
return retval;
}
int sis_fb_free(DRM_IOCTL_ARGS)
static int sis_fb_free(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private;
@ -251,7 +240,7 @@ int sis_fb_free(DRM_IOCTL_ARGS)
/* agp memory management */
int sis_ioctl_agp_init(DRM_IOCTL_ARGS)
static int sis_ioctl_agp_init(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private;
@ -278,7 +267,7 @@ int sis_ioctl_agp_init(DRM_IOCTL_ARGS)
return 0;
}
int sis_ioctl_agp_alloc(DRM_IOCTL_ARGS)
static int sis_ioctl_agp_alloc(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private;
@ -315,7 +304,7 @@ int sis_ioctl_agp_alloc(DRM_IOCTL_ARGS)
return retval;
}
int sis_ioctl_agp_free(DRM_IOCTL_ARGS)
static int sis_ioctl_agp_free(DRM_IOCTL_ARGS)
{
DRM_DEVICE;
drm_sis_private_t *dev_priv = dev->dev_private;
@ -416,3 +405,14 @@ int sis_final_context(struct drm_device *dev, int context)
return 1;
}
drm_ioctl_desc_t sis_ioctls[] = {
[DRM_IOCTL_NR(DRM_SIS_FB_ALLOC)] = {sis_fb_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_FB_FREE)] = {sis_fb_free, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_AGP_INIT)] = {sis_ioctl_agp_init, 1, 1},
[DRM_IOCTL_NR(DRM_SIS_AGP_ALLOC)] = {sis_ioctl_agp_alloc, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_AGP_FREE)] = {sis_ioctl_agp_free, 1, 0},
[DRM_IOCTL_NR(DRM_SIS_FB_INIT)] = {sis_fb_init, 1, 1}
};
int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);

4
shared-core/via_dma.c
View File

@ -69,7 +69,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv);
static void via_cmdbuf_pause(drm_via_private_t * dev_priv);
static void via_cmdbuf_reset(drm_via_private_t * dev_priv);
static void via_cmdbuf_rewind(drm_via_private_t * dev_priv);
static int via_wait_idle(drm_via_private_t * dev_priv);
/*
* Free space in command buffer.
*/
@ -514,7 +514,7 @@ static int via_hook_segment(drm_via_private_t *dev_priv,
int via_wait_idle(drm_via_private_t * dev_priv)
static int via_wait_idle(drm_via_private_t * dev_priv)
{
int count = 10000000;
while (count-- && (VIA_READ(VIA_REG_STATUS) &

2
shared-core/via_drv.h
View File

@ -79,7 +79,6 @@ typedef struct drm_via_private {
extern int via_init_context(drm_device_t * dev, int context);
extern int via_final_context(drm_device_t * dev, int context);
extern int via_do_init_map(drm_device_t * dev, drm_via_init_t * init);
extern int via_do_cleanup_map(drm_device_t * dev);
extern int via_map_init(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
@ -92,7 +91,6 @@ extern void via_driver_irq_uninstall(drm_device_t * dev);
extern int via_dma_cleanup(drm_device_t * dev);
extern void via_init_command_verifier(void);
extern int via_wait_idle(drm_via_private_t * dev_priv);
extern int via_driver_dma_quiescent(drm_device_t * dev);

108
shared-core/via_ds.c
View File

@ -126,31 +126,8 @@ int via_setDestroy(set_t * set)
#define ISFREE(bptr) ((bptr)->free)
#define PRINTF(fmt, arg...) do{}while(0)
#define fprintf(fmt, arg...) do{}while(0)
void via_mmDumpMemInfo(memHeap_t * heap)
{
TMemBlock *p;
PRINTF("Memory heap %p:\n", heap);
if (heap == 0)
PRINTF(" heap == 0\n");
else {
p = (TMemBlock *) heap;
while (p) {
PRINTF(" Offset:%08x, Size:%08x, %c%c\n", p->ofs,
p->size, p->free ? '.' : 'U',
p->reserved ? 'R' : '.');
p = p->next;
}
}
PRINTF("End of memory blocks\n");
}
memHeap_t *via_mmInit(int ofs, int size)
{
PMemBlock blocks;
@ -169,29 +146,6 @@ memHeap_t *via_mmInit(int ofs, int size)
return 0;
}
memHeap_t *via_mmAddRange(memHeap_t * heap, int ofs, int size)
{
PMemBlock blocks;
blocks = (TMemBlock *) drm_calloc(2, sizeof(TMemBlock), DRM_MEM_DRIVER);
if (blocks) {
blocks[0].size = size;
blocks[0].free = 1;
blocks[0].ofs = ofs;
blocks[0].next = &blocks[1];
/* Discontinuity - stops JoinBlock from trying to join non-adjacent
* ranges.
*/
blocks[1].size = 0;
blocks[1].free = 0;
blocks[1].ofs = ofs + size;
blocks[1].next = (PMemBlock) heap;
return (memHeap_t *) blocks;
} else
return heap;
}
static TMemBlock *SliceBlock(TMemBlock * p,
int startofs, int size,
int reserved, int alignment)
@ -324,65 +278,3 @@ int via_mmFreeMem(PMemBlock b)
return 0;
}
int via_mmReserveMem(memHeap_t * heap, int offset, int size)
{
int endofs;
TMemBlock *p;
if (!heap || size <= 0)
return -1;
endofs = offset + size;
p = (TMemBlock *) heap;
while (p && p->ofs <= offset) {
if (ISFREE(p) && endofs <= (p->ofs + p->size)) {
SliceBlock(p, offset, size, 1, 1);
return 0;
}
p = p->next;
}
return -1;
}
int via_mmFreeReserved(memHeap_t * heap, int offset)
{
TMemBlock *p, *prev;
if (!heap)
return -1;
p = (TMemBlock *) heap;
prev = NULL;
while (p && p->ofs != offset) {
prev = p;
p = p->next;
}
if (!p || !p->reserved)
return -1;
p->free = 1;
p->reserved = 0;
Join2Blocks(p);
if (prev)
Join2Blocks(prev);
return 0;
}
void via_mmDestroy(memHeap_t * heap)
{
TMemBlock *p, *q;
if (!heap)
return;
p = (TMemBlock *) heap;
while (p) {
q = p->next;
drm_free(p, sizeof(TMemBlock), DRM_MEM_DRIVER);
p = q;
}
}

8
shared-core/via_ds.h
View File

@ -101,12 +101,4 @@ PMemBlock via_mmAllocMem(memHeap_t * heap, int size, int align2,
*/
int via_mmFreeMem(PMemBlock b);
/*
* destroy MM
*/
void via_mmDestroy(memHeap_t * mmInit);
/* For debugging purpose. */
void via_mmDumpMemInfo(memHeap_t * mmInit);
#endif

2
shared-core/via_map.c
View File

@ -25,7 +25,7 @@
#include "via_drm.h"
#include "via_drv.h"
int via_do_init_map(drm_device_t * dev, drm_via_init_t * init)
static int via_do_init_map(drm_device_t * dev, drm_via_init_t * init)
{
drm_via_private_t *dev_priv;
unsigned int i;

15
shared-core/via_mm.c
View File

@ -29,8 +29,6 @@
#define MAX_CONTEXT 100
unsigned int VIA_DEBUG = 1;
typedef struct {
int used;
int context;
@ -39,6 +37,11 @@ typedef struct {
static via_context_t global_ppriv[MAX_CONTEXT];
static int via_agp_alloc(drm_via_mem_t * mem);
static int via_agp_free(drm_via_mem_t * mem);
static int via_fb_alloc(drm_via_mem_t * mem);
static int via_fb_free(drm_via_mem_t * mem);
static int add_alloc_set(int context, int type, unsigned int val)
{
int i, retval = 0;
@ -224,7 +227,7 @@ int via_mem_alloc(DRM_IOCTL_ARGS)
return -EFAULT;
}
int via_fb_alloc(drm_via_mem_t * mem)
static int via_fb_alloc(drm_via_mem_t * mem)
{
drm_via_mm_t fb;
PMemBlock block;
@ -261,7 +264,7 @@ int via_fb_alloc(drm_via_mem_t * mem)
return retval;
}
int via_agp_alloc(drm_via_mem_t * mem)
static int via_agp_alloc(drm_via_mem_t * mem)
{
drm_via_mm_t agp;
PMemBlock block;
@ -317,7 +320,7 @@ int via_mem_free(DRM_IOCTL_ARGS)
return -EFAULT;
}
int via_fb_free(drm_via_mem_t * mem)
static int via_fb_free(drm_via_mem_t * mem)
{
drm_via_mm_t fb;
int retval = 0;
@ -345,7 +348,7 @@ int via_fb_free(drm_via_mem_t * mem)
return retval;
}
int via_agp_free(drm_via_mem_t * mem)
static int via_agp_free(drm_via_mem_t * mem)
{
drm_via_mm_t agp;

5
shared-core/via_mm.h
View File

@ -37,9 +37,4 @@ typedef struct {
void *virtual;
} drm_via_dma_t;
int via_fb_alloc(drm_via_mem_t * mem);
int via_fb_free(drm_via_mem_t * mem);
int via_agp_alloc(drm_via_mem_t * mem);
int via_agp_free(drm_via_mem_t * mem);
#endif