radeon: fix some warnings
parent
52ef9d87db
commit
0dbe3436ee
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@ -39,7 +39,7 @@
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#define ATI_PCIE_WRITE 0x4
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#define ATI_PCIE_READ 0x8
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static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *gart_info, dma_addr_t addr, u32 *pci_gart)
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static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *gart_info, dma_addr_t addr, volatile u32 *pci_gart)
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{
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u32 page_base;
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@ -61,7 +61,7 @@ static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *
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*pci_gart = cpu_to_le32(page_base);
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}
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static __inline__ dma_addr_t gart_get_page_from_table(struct drm_ati_pcigart_info *gart_info, u32 *pci_gart)
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static __inline__ dma_addr_t gart_get_page_from_table(struct drm_ati_pcigart_info *gart_info, volatile u32 *pci_gart)
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{
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dma_addr_t retval;
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switch(gart_info->gart_reg_if) {
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@ -93,7 +93,7 @@ int drm_ati_alloc_pcigart_table(struct drm_device *dev,
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#ifdef CONFIG_X86
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/* IGPs only exist on x86 in any case */
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if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
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set_memory_uc(gart_info->table_handle->vaddr, gart_info->table_size >> PAGE_SHIFT);
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set_memory_uc((unsigned long)gart_info->table_handle->vaddr, gart_info->table_size >> PAGE_SHIFT);
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#endif
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memset(gart_info->table_handle->vaddr, 0, gart_info->table_size);
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@ -107,7 +107,7 @@ static void drm_ati_free_pcigart_table(struct drm_device *dev,
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#ifdef CONFIG_X86
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/* IGPs only exist on x86 in any case */
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if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
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set_memory_wb(gart_info->table_handle->vaddr, gart_info->table_size >> PAGE_SHIFT);
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set_memory_wb((unsigned long)gart_info->table_handle->vaddr, gart_info->table_size >> PAGE_SHIFT);
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#endif
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drm_pci_free(dev, gart_info->table_handle);
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gart_info->table_handle = NULL;
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@ -260,7 +260,7 @@ static int ati_pcigart_bind_ttm(struct drm_ttm_backend *backend,
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j = offset;
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while (j < (offset + atipci_be->num_pages)) {
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if (gart_get_page_from_table(info, pci_gart+j))
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if (gart_get_page_from_table(info, pci_gart + j))
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return -EBUSY;
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j++;
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}
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@ -1544,7 +1544,6 @@ int drm_mapbufs(struct drm_device *dev, void *data,
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goto done;
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}
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down_write(¤t->mm->mmap_sem);
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DRM_DEBUG("%x %d\n", token, map->size);
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virtual = do_mmap(file_priv->filp, 0, map->size,
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PROT_READ | PROT_WRITE,
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MAP_SHARED,
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@ -350,7 +350,6 @@ static int radeon_move_vram(struct drm_buffer_object * bo,
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struct drm_bo_mem_reg tmp_mem;
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struct drm_bo_mem_reg *old_mem = &bo->mem;
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int ret;
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bool was_local = false;
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/* old - LOCAL memory node bo->mem
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tmp - TT type memory node
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@ -398,7 +397,6 @@ int radeon_move(struct drm_buffer_object * bo,
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int evict, int no_wait, struct drm_bo_mem_reg *new_mem)
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{
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struct drm_device *dev = bo->dev;
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struct drm_bo_mem_reg *old_mem = &bo->mem;
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drm_radeon_private_t *dev_priv = dev->dev_private;
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if (!dev_priv->cp_running)
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@ -1353,7 +1353,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
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#define R300_RB3D_COLORPITCH2 0x4E40 /* GUESS */
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#define R300_RB3D_COLORPITCH3 0x4E44 /* GUESS */
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#define R300_RB3D_AARESOLVE_CTL 0x4E88
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//#define R300_RB3D_AARESOLVE_CTL 0x4E88
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/* gap */
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/* Guess by Vladimir.
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@ -2434,7 +2434,7 @@ int radeon_modeset_agp_init(struct drm_device *dev)
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ret = drm_agp_enable(dev, mode);
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if (ret) {
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DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode);
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DRM_ERROR("Unable to enable AGP (mode = 0x%lx)\n", mode.mode);
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return ret;
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}
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@ -2457,7 +2457,7 @@ int radeon_modeset_cp_init(struct drm_device *dev)
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dev_priv->writeback_works = 0;
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if (dev_priv->chip_family > CHIP_R600)
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return;
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return 0;
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dev_priv->usec_timeout = RADEON_DEFAULT_CP_TIMEOUT;
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dev_priv->ring.size = RADEON_DEFAULT_RING_SIZE;
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@ -2713,7 +2713,6 @@ int radeon_master_create(struct drm_device *dev, struct drm_master *master)
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void radeon_master_destroy(struct drm_device *dev, struct drm_master *master)
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{
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struct drm_radeon_master_private *master_priv = master->driver_priv;
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struct drm_radeon_private *dev_priv = dev->dev_private;
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if (!master_priv)
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return;
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@ -2735,8 +2734,6 @@ void radeon_master_destroy(struct drm_device *dev, struct drm_master *master)
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*/
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int radeon_driver_firstopen(struct drm_device *dev)
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{
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int ret;
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drm_local_map_t *map;
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drm_radeon_private_t *dev_priv = dev->dev_private;
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dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE;
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