parent
908d32f84c
commit
0e7f6c0726
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@ -385,36 +385,48 @@ extern int r128_cce_indirect( struct inode *inode, struct file *filp,
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#define R128_DEREF(reg) *(volatile u32 *)R128_ADDR( reg )
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#ifdef __alpha__
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#define R128_READ(reg) (_R128_READ((u32 *)R128_ADDR(reg)))
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static inline u32 _R128_READ(u32 *addr) {
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mb();
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return *(volatile u32 *)addr;
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#define R128_READ(reg) (_R128_READ((u32 *)R128_ADDR(reg)))
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static inline u32 _R128_READ(u32 *addr)
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{
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mb();
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return *(volatile u32 *)addr;
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}
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#define R128_WRITE(reg,val) \
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do { wmb(); R128_DEREF(reg) = val; } while (0)
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#define R128_WRITE(reg,val) \
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do { \
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wmb(); \
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R128_DEREF(reg) = val; \
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} while (0)
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#else
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#define R128_READ(reg) le32_to_cpu( R128_DEREF( reg ) )
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#define R128_WRITE(reg,val) do { R128_DEREF( reg ) = cpu_to_le32( val ); } while (0)
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#define R128_WRITE(reg,val) \
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do { \
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R128_DEREF( reg ) = cpu_to_le32( val ); \
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} while (0)
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#endif
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#define R128_DEREF8(reg) *(volatile u8 *)R128_ADDR( reg )
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#ifdef __alpha__
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#define R128_READ8(reg) _R128_READ8((u8 *)R128_ADDR(reg))
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static inline u8 _R128_READ8(u8 *addr) {
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static inline u8 _R128_READ8(u8 *addr)
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{
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mb();
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return *(volatile u8 *)addr;
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}
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#define R128_WRITE8(reg,val) \
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do { wmb(); R128_DEREF8(reg) = val; } while (0)
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#define R128_WRITE8(reg,val) \
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do { \
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wmb(); \
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R128_DEREF8(reg) = val; \
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} while (0)
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#else
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#define R128_READ8(reg) R128_DEREF8( reg )
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#define R128_WRITE8(reg,val) do { R128_DEREF8( reg ) = val; } while (0)
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#endif
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#define R128_WRITE_PLL(addr,val) \
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do { \
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R128_WRITE8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x1f) | R128_PLL_WR_EN); \
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R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
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#define R128_WRITE_PLL(addr,val) \
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do { \
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R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
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((addr) & 0x1f) | R128_PLL_WR_EN); \
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R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
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} while (0)
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extern int R128_READ_PLL(drm_device_t *dev, int addr);
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@ -521,13 +521,15 @@ extern int radeon_cp_indirect( struct inode *inode, struct file *filp,
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#define RADEON_DEREF(reg) *(volatile u32 *)RADEON_ADDR( reg )
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#ifdef __alpha__
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#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR( reg )))
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static inline u32 _RADEON_READ(u32 *addr) {
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static inline u32 _RADEON_READ(u32 *addr)
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{
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mb();
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return *(volatile u32 *)addr;
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}
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#define RADEON_WRITE(reg,val) do { \
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wmb();
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RADEON_DEREF(reg) = val;
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#define RADEON_WRITE(reg,val) \
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do { \
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wmb(); \
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RADEON_DEREF(reg) = val; \
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} while (0)
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#else
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#define RADEON_READ(reg) RADEON_DEREF( reg )
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@ -537,20 +539,23 @@ static inline u32 _RADEON_READ(u32 *addr) {
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#define RADEON_DEREF8(reg) *(volatile u8 *)RADEON_ADDR( reg )
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#ifdef __alpha__
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#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR( reg ))
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static inline u8 _RADEON_READ8(u8 *addr) {
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static inline u8 _RADEON_READ8(u8 *addr)
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{
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mb();
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return *(volatile u8 *)addr;
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}
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#define RADEON_WRITE8(reg,val) do { \
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wmb();
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RADEON_DEREF8( reg ) = val;
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#define RADEON_WRITE8(reg,val) \
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do { \
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wmb(); \
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RADEON_DEREF8( reg ) = val; \
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} while (0)
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#else
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#define RADEON_READ8(reg) RADEON_DEREF8( reg )
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#define RADEON_WRITE8(reg, val) do { RADEON_DEREF8( reg ) = val; } while (0)
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#endif
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#define RADEON_WRITE_PLL( addr, val ) do { \
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#define RADEON_WRITE_PLL( addr, val ) \
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do { \
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RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX, \
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((addr) & 0x1f) | RADEON_PLL_WR_EN ); \
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RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) ); \
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