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amdgpu: remove amdgpu_ib 

Not useful if we're gonna use BO handles directly.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
main
Marek Olšák 2015-05-29 19:13:41 +02:00 committed by Alex Deucher
parent 2a344a8d8a
commit 194d5c2ee4
6 changed files with 32 additions and 80 deletions
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13
amdgpu/amdgpu.h
View File

@ -125,13 +125,6 @@ typedef struct amdgpu_bo *amdgpu_bo_handle;
*/
typedef struct amdgpu_bo_list *amdgpu_bo_list_handle;
/**
* Define handle to be used when dealing with command
* buffers (a.k.a. ibs)
*
*/
typedef struct amdgpu_ib *amdgpu_ib_handle;
/*--------------------------------------------------------------------------*/
/* -------------------------- Structures ---------------------------------- */
@ -305,7 +298,7 @@ struct amdgpu_gds_alloc_info {
*/
struct amdgpu_cs_ib_alloc_result {
/** IB allocation handle */
amdgpu_ib_handle handle;
amdgpu_bo_handle handle;
/** Assigned GPU VM MC Address of command buffer */
uint64_t mc_address;
@ -325,7 +318,7 @@ struct amdgpu_cs_ib_info {
uint64_t flags;
/** Handle of command buffer */
amdgpu_ib_handle ib_handle;
amdgpu_bo_handle bo_handle;
/**
* Size of Command Buffer to be submitted.
@ -964,7 +957,7 @@ int amdgpu_cs_alloc_ib(amdgpu_context_handle context,
* \sa amdgpu_cs_alloc_ib()
*
*/
int amdgpu_cs_free_ib(amdgpu_ib_handle handle);
int amdgpu_cs_free_ib(amdgpu_bo_handle handle);
/**
* Send request to submit command buffers to hardware.

70
amdgpu/amdgpu_cs.c
View File

@ -42,17 +42,21 @@
*
* \return 0 on success otherwise POSIX Error code
*/
static int amdgpu_cs_create_ib(amdgpu_context_handle context,
int amdgpu_cs_alloc_ib(amdgpu_context_handle context,
enum amdgpu_cs_ib_size ib_size,
amdgpu_ib_handle *ib)
struct amdgpu_cs_ib_alloc_result *output)
{
struct amdgpu_bo_alloc_request alloc_buffer;
struct amdgpu_bo_alloc_request alloc_buffer = {};
struct amdgpu_bo_alloc_result info;
int r;
void *cpu;
struct amdgpu_ib *new_ib;
memset(&alloc_buffer, 0, sizeof(alloc_buffer));
if (NULL == context)
return -EINVAL;
if (NULL == output)
return -EINVAL;
if (ib_size >= AMDGPU_CS_IB_SIZE_NUM)
return -EINVAL;
switch (ib_size) {
case amdgpu_cs_ib_size_4K:
@ -89,18 +93,9 @@ static int amdgpu_cs_create_ib(amdgpu_context_handle context,
return r;
}
new_ib = malloc(sizeof(struct amdgpu_ib));
if (NULL == new_ib) {
amdgpu_bo_cpu_unmap(info.buf_handle);
amdgpu_bo_free(info.buf_handle);
return -ENOMEM;
}
new_ib->context = context;
new_ib->buf_handle = info.buf_handle;
new_ib->cpu = cpu;
new_ib->virtual_mc_base_address = info.virtual_mc_base_address;
*ib = new_ib;
output->handle = info.buf_handle;
output->cpu = cpu;
output->mc_address = info.virtual_mc_base_address;
return 0;
}
@ -111,47 +106,18 @@ static int amdgpu_cs_create_ib(amdgpu_context_handle context,
*
* \return 0 on success otherwise POSIX Error code
*/
int amdgpu_cs_free_ib(amdgpu_ib_handle ib)
int amdgpu_cs_free_ib(amdgpu_bo_handle bo)
{
int r;
if (!ib)
if (!bo)
return -EINVAL;
r = amdgpu_bo_cpu_unmap(ib->buf_handle);
r = amdgpu_bo_cpu_unmap(bo);
if (r)
return r;
r = amdgpu_bo_free(ib->buf_handle);
if (r)
return r;
free(ib);
return 0;
}
int amdgpu_cs_alloc_ib(amdgpu_context_handle context,
enum amdgpu_cs_ib_size ib_size,
struct amdgpu_cs_ib_alloc_result *output)
{
int r;
amdgpu_ib_handle ib;
if (NULL == context)
return -EINVAL;
if (NULL == output)
return -EINVAL;
if (ib_size >= AMDGPU_CS_IB_SIZE_NUM)
return -EINVAL;
r = amdgpu_cs_create_ib(context, ib_size, &ib);
if (!r) {
output->handle = ib;
output->cpu = ib->cpu;
output->mc_address = ib->virtual_mc_base_address;
}
return r;
return amdgpu_bo_free(bo);
}
/**
@ -346,8 +312,8 @@ static int amdgpu_cs_submit_one(amdgpu_context_handle context,
ib = &ibs_request->ibs[i];
chunk_data[i].ib_data.handle = ib->ib_handle->buf_handle->handle;
chunk_data[i].ib_data.va_start = ib->ib_handle->virtual_mc_base_address
chunk_data[i].ib_data.handle = ib->bo_handle->handle;
chunk_data[i].ib_data.va_start = ib->bo_handle->virtual_mc_base_address
+ ib->offset_dw * 4;
chunk_data[i].ib_data.ib_bytes = ib->size * 4;
chunk_data[i].ib_data.ip_type = ibs_request->ip_type;

7
amdgpu/amdgpu_internal.h
View File

@ -111,13 +111,6 @@ struct amdgpu_context {
uint32_t id;
};
struct amdgpu_ib {
amdgpu_context_handle context;
amdgpu_bo_handle buf_handle;
void *cpu;
uint64_t virtual_mc_base_address;
};
/**
* Functions.
*/

12
tests/amdgpu/basic_tests.c
View File

@ -184,7 +184,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
ptr[1] = 0;
ptr[2] = 0xc0008400;
ptr[3] = 1;
ib_info[0].ib_handle = ib_result_ce.handle;
ib_info[0].bo_handle = ib_result_ce.handle;
ib_info[0].size = 4;
ib_info[0].flags = AMDGPU_IB_FLAG_CE;
@ -192,7 +192,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void)
ptr = ib_result.cpu;
ptr[0] = 0xc0008600;
ptr[1] = 0x00000001;
ib_info[1].ib_handle = ib_result.handle;
ib_info[1].bo_handle = ib_result.handle;
ib_info[1].size = 2;
ibs_request.ip_type = AMDGPU_HW_IP_GFX;
@ -246,14 +246,14 @@ static void amdgpu_command_submission_gfx_shared_ib(void)
ptr[1] = 0;
ptr[2] = 0xc0008400;
ptr[3] = 1;
ib_info[0].ib_handle = ib_result.handle;
ib_info[0].bo_handle = ib_result.handle;
ib_info[0].size = 4;
ib_info[0].flags = AMDGPU_IB_FLAG_CE;
ptr = (uint32_t *)ib_result.cpu + 4;
ptr[0] = 0xc0008600;
ptr[1] = 0x00000001;
ib_info[1].ib_handle = ib_result.handle;
ib_info[1].bo_handle = ib_result.handle;
ib_info[1].size = 2;
ib_info[1].offset_dw = 4;
@ -312,7 +312,7 @@ static void amdgpu_command_submission_compute(void)
ptr[i] = 0xffff1000;
memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
ib_info.ib_handle = ib_result.handle;
ib_info.bo_handle = ib_result.handle;
ib_info.size = 16;
memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
@ -375,7 +375,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle,
ring_ptr = ib_result.cpu;
memcpy(ring_ptr, pm4_src, pm4_dw * sizeof(*pm4_src));
ib_info->ib_handle = ib_result.handle;
ib_info->bo_handle = ib_result.handle;
ib_info->size = pm4_dw;
ibs_request->ip_type = AMDGPU_HW_IP_DMA;

4
tests/amdgpu/cs_tests.c
View File

@ -40,7 +40,7 @@ static uint32_t minor_version;
static uint32_t family_id;
static amdgpu_context_handle context_handle;
static amdgpu_ib_handle ib_handle;
static amdgpu_bo_handle ib_handle;
uint32_t *ib_cpu;
static amdgpu_bo_handle resources[MAX_RESOURCES];
@ -111,7 +111,7 @@ static int submit(unsigned ndw, unsigned ip)
uint32_t expired;
int r;
ib_info.ib_handle = ib_handle;
ib_info.bo_handle = ib_handle;
ib_info.size = ndw;
ibs_request.ip_type = ip;

4
tests/amdgpu/vce_tests.c
View File

@ -61,7 +61,7 @@ static uint32_t minor_version;
static uint32_t family_id;
static amdgpu_context_handle context_handle;
static amdgpu_ib_handle ib_handle;
static amdgpu_bo_handle ib_handle;
uint32_t *ib_cpu;
struct amdgpu_vce_encode enc;
@ -135,7 +135,7 @@ static int submit(unsigned ndw, unsigned ip)
uint32_t expired;
int r;
ib_info.ib_handle = ib_handle;
ib_info.bo_handle = ib_handle;
ib_info.size = ndw;
ibs_request.ip_type = ip;