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radeon: pull bus master enable into its own function

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Dave Airlie 2008-11-03 09:32:39 +10:00
parent 653b16f2dd
commit 1c817cc3fc
3 changed files with 20 additions and 10 deletions
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6
linux-core/radeon_pm.c
View File

@ -93,7 +93,6 @@ int radeon_resume(struct drm_device *dev)
struct drm_radeon_private *dev_priv = dev->dev_private; struct drm_radeon_private *dev_priv = dev->dev_private;
struct drm_framebuffer *fb; struct drm_framebuffer *fb;
int i; int i;
u32 tmp;
if (!drm_core_check_feature(dev, DRIVER_MODESET)) if (!drm_core_check_feature(dev, DRIVER_MODESET))
return 0; return 0;
@ -104,10 +103,7 @@ int radeon_resume(struct drm_device *dev)
return -1; return -1;
/* Turn on bus mastering -todo fix properly */ /* Turn on bus mastering -todo fix properly */
if (dev_priv->chip_family < CHIP_RV380) { radeon_enable_bm(dev_priv);
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
}
DRM_ERROR("\n"); DRM_ERROR("\n");
/* on atom cards re init the whole card /* on atom cards re init the whole card

22
shared-core/radeon_cp.c
View File

@ -194,6 +194,23 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
} }
} }
void radeon_enable_bm(struct drm_radeon_private *dev_priv)
{
u32 tmp;
/* Turn on bus mastering */
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
/* rs400, rs690/rs740 */
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
} else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
} /* PCIE cards appears to not need this */
}
void radeon_pll_errata_after_index(struct drm_radeon_private *dev_priv) void radeon_pll_errata_after_index(struct drm_radeon_private *dev_priv)
{ {
@ -686,7 +703,6 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
drm_radeon_private_t * dev_priv) drm_radeon_private_t * dev_priv)
{ {
u32 ring_start, cur_read_ptr; u32 ring_start, cur_read_ptr;
u32 tmp;
/* Initialize the memory controller. With new memory map, the fb location /* Initialize the memory controller. With new memory map, the fb location
* is not changed, it should have been properly initialized already. Part * is not changed, it should have been properly initialized already. Part
@ -796,9 +812,7 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
else else
RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x1f); RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x1f);
/* Turn on bus mastering */ radeon_enable_bm(dev_priv);
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
dev_priv->scratch[0] = 0; dev_priv->scratch[0] = 0;
RADEON_WRITE(RADEON_LAST_FRAME_REG, 0); RADEON_WRITE(RADEON_LAST_FRAME_REG, 0);

2
shared-core/radeon_drv.h
View File

@ -1691,7 +1691,7 @@ extern int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *
extern int radeon_cs_init(struct drm_device *dev); extern int radeon_cs_init(struct drm_device *dev);
void radeon_gem_update_offsets(struct drm_device *dev, struct drm_master *master); void radeon_gem_update_offsets(struct drm_device *dev, struct drm_master *master);
void radeon_init_memory_map(struct drm_device *dev); void radeon_init_memory_map(struct drm_device *dev);
void radeon_enable_bm(struct drm_radeon_private *dev_priv);
#define MARK_SAFE 1 #define MARK_SAFE 1
#define MARK_CHECK_OFFSET 2 #define MARK_CHECK_OFFSET 2