From 1d4d1e6b138aac8bd734c4c20617a43fb3337c63 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Thu, 4 Mar 2010 16:09:40 -0800
Subject: [PATCH] intel: Only align Y-tiling pitch to the Y tile width.

Fixes piglit depth-tex-modes on gen4.
---
 intel/intel_bufmgr_gem.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index f852c09d..21fe099e 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -254,12 +254,17 @@ static unsigned long
 drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem,
 			    unsigned long pitch, uint32_t tiling_mode)
 {
-	unsigned long tile_width = 512;
+	unsigned long tile_width;
 	unsigned long i;
 
 	if (tiling_mode == I915_TILING_NONE)
 		return pitch;
 
+	if (tiling_mode == I915_TILING_X)
+		tile_width = 512;
+	else
+		tile_width = 128;
+
 	/* 965 is flexible */
 	if (bufmgr_gem->gen >= 4)
 		return ROUND_UP_TO(pitch, tile_width);