do a TCL state flush before accessing VAP_CNTL to prevent lockups on r200 when enabling/disabling vertex programs
parent
ef98a8e20d
commit
1f71b8d7a4
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@ -174,6 +174,14 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
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}
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break;
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case R200_EMIT_VAP_CTL: {
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RING_LOCALS;
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BEGIN_RING(2);
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OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0);
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ADVANCE_RING();
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}
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break;
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case RADEON_EMIT_RB3D_COLORPITCH:
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case RADEON_EMIT_RE_LINE_PATTERN:
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case RADEON_EMIT_SE_LINE_WIDTH:
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@ -201,7 +209,6 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
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case R200_EMIT_TCL_LIGHT_MODEL_CTL_0:
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case R200_EMIT_TFACTOR_0:
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case R200_EMIT_VTX_FMT_0:
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case R200_EMIT_VAP_CTL:
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case R200_EMIT_MATRIX_SELECT_0:
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case R200_EMIT_TEX_PROC_CTL_2:
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case R200_EMIT_TCL_UCP_VERT_BLEND_CTL:
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