Synchronize with the shared-core version.
Ian Romanick
parent
dfc650bd80
commit
28759fd872
125
shared/mga_drm.h
125
shared/mga_drm.h
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@ -44,10 +44,10 @@
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/* WARP pipe flags
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*/
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#define MGA_F 0x1 /* fog */
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#define MGA_A 0x2 /* alpha */
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#define MGA_S 0x4 /* specular */
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#define MGA_T2 0x8 /* multitexture */
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#define MGA_F 0x1 /* fog */
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#define MGA_A 0x2 /* alpha */
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#define MGA_S 0x4 /* specular */
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#define MGA_T2 0x8 /* multitexture */
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#define MGA_WARP_TGZ 0
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#define MGA_WARP_TGZF (MGA_F)
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@ -66,15 +66,14 @@
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#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
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#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
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#define MGA_MAX_G200_PIPES 8 /* no multitex */
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#define MGA_MAX_G200_PIPES 8 /* no multitex */
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#define MGA_MAX_G400_PIPES 16
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#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
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#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
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#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
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#define MGA_CARD_TYPE_G200 1
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#define MGA_CARD_TYPE_G400 2
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#define MGA_FRONT 0x1
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#define MGA_BACK 0x2
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#define MGA_DEPTH 0x4
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@ -85,14 +84,14 @@
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#define MGA_UPLOAD_TEX0 0x2
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#define MGA_UPLOAD_TEX1 0x4
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#define MGA_UPLOAD_PIPE 0x8
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#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
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#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
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#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
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#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
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#define MGA_UPLOAD_2D 0x40
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#define MGA_WAIT_AGE 0x80 /* handled client-side */
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#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
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#define MGA_WAIT_AGE 0x80 /* handled client-side */
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#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
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#if 0
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#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
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quiescent */
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#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
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quiescent */
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#endif
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/* 32 buffers of 64k each, total 2 meg.
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@ -119,8 +118,7 @@
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#define DRM_MGA_IDLE_RETRY 2048
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#endif /* __MGA_SAREA_DEFINES__ */
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#endif /* __MGA_SAREA_DEFINES__ */
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/* Setup registers for 3D context
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*/
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@ -164,25 +162,25 @@ typedef struct {
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/* General aging mechanism
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*/
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typedef struct {
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unsigned int head; /* Position of head pointer */
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unsigned int wrap; /* Primary DMA wrap count */
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unsigned int head; /* Position of head pointer */
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unsigned int wrap; /* Primary DMA wrap count */
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} drm_mga_age_t;
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typedef struct _drm_mga_sarea {
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/* The channel for communication of state information to the kernel
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* on firing a vertex dma buffer.
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*/
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drm_mga_context_regs_t context_state;
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drm_mga_server_regs_t server_state;
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drm_mga_texture_regs_t tex_state[2];
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unsigned int warp_pipe;
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unsigned int dirty;
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unsigned int vertsize;
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drm_mga_context_regs_t context_state;
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drm_mga_server_regs_t server_state;
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drm_mga_texture_regs_t tex_state[2];
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unsigned int warp_pipe;
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unsigned int dirty;
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unsigned int vertsize;
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/* The current cliprects, or a subset thereof.
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*/
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drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
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unsigned int nbox;
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drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
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unsigned int nbox;
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/* Information about the most recently used 3d drawable. The
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* client fills in the req_* fields, the server fills in the
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@ -191,18 +189,18 @@ typedef struct _drm_mga_sarea {
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* The client clears the exported_drawable field before
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* clobbering the boxes data.
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*/
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unsigned int req_drawable; /* the X drawable id */
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unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
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unsigned int req_drawable; /* the X drawable id */
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unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
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unsigned int exported_drawable;
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unsigned int exported_drawable;
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unsigned int exported_index;
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unsigned int exported_stamp;
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unsigned int exported_buffers;
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unsigned int exported_nfront;
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unsigned int exported_nback;
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unsigned int exported_stamp;
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unsigned int exported_buffers;
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unsigned int exported_nfront;
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unsigned int exported_nback;
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int exported_back_x, exported_front_x, exported_w;
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int exported_back_y, exported_front_y, exported_h;
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drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
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drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
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/* Counters for aging textures and for client-side throttling.
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*/
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@ -210,25 +208,21 @@ typedef struct _drm_mga_sarea {
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unsigned int last_wrap;
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drm_mga_age_t last_frame;
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unsigned int last_enqueue; /* last time a buffer was enqueued */
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unsigned int last_enqueue; /* last time a buffer was enqueued */
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unsigned int last_dispatch; /* age of the most recently dispatched buffer */
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unsigned int last_quiescent; /* */
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unsigned int last_quiescent; /* */
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/* LRU lists for texture memory in agp space and on the card.
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*/
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drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
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drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
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unsigned int texAge[MGA_NR_TEX_HEAPS];
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/* Mechanism to validate card state.
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*/
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int ctxOwner;
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int ctxOwner;
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} drm_mga_sarea_t;
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/* WARNING: If you change any of these defines, make sure to change the
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* defines in the Xserver file (xf86drmMga.h)
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*/
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/* MGA specific ioctls
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* The device specific ioctl range is 0x40 to 0x79.
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*/
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@ -255,33 +249,33 @@ typedef struct _drm_mga_sarea {
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#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
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typedef struct _drm_mga_warp_index {
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int installed;
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unsigned long phys_addr;
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int size;
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int installed;
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unsigned long phys_addr;
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int size;
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} drm_mga_warp_index_t;
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typedef struct drm_mga_init {
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enum {
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MGA_INIT_DMA = 0x01,
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MGA_CLEANUP_DMA = 0x02
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enum {
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MGA_INIT_DMA = 0x01,
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MGA_CLEANUP_DMA = 0x02
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} func;
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unsigned long sarea_priv_offset;
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unsigned long sarea_priv_offset;
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int chipset;
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int sgram;
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int sgram;
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unsigned int maccess;
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unsigned int fb_cpp;
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unsigned int fb_cpp;
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unsigned int front_offset, front_pitch;
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unsigned int back_offset, back_pitch;
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unsigned int back_offset, back_pitch;
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unsigned int depth_cpp;
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unsigned int depth_offset, depth_pitch;
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unsigned int depth_cpp;
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unsigned int depth_offset, depth_pitch;
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unsigned int texture_offset[MGA_NR_TEX_HEAPS];
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unsigned int texture_size[MGA_NR_TEX_HEAPS];
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unsigned int texture_offset[MGA_NR_TEX_HEAPS];
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unsigned int texture_size[MGA_NR_TEX_HEAPS];
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unsigned long fb_offset;
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unsigned long mmio_offset;
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@ -291,13 +285,6 @@ typedef struct drm_mga_init {
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unsigned long buffers_offset;
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} drm_mga_init_t;
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typedef struct drm_mga_fullscreen {
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enum {
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MGA_INIT_FULLSCREEN = 0x01,
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MGA_CLEANUP_FULLSCREEN = 0x02
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} func;
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} drm_mga_fullscreen_t;
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typedef struct drm_mga_clear {
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unsigned int flags;
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unsigned int clear_color;
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@ -307,16 +294,16 @@ typedef struct drm_mga_clear {
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} drm_mga_clear_t;
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typedef struct drm_mga_vertex {
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int idx; /* buffer to queue */
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int used; /* bytes in use */
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int discard; /* client finished with buffer? */
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int idx; /* buffer to queue */
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int used; /* bytes in use */
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int discard; /* client finished with buffer? */
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} drm_mga_vertex_t;
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typedef struct drm_mga_indices {
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int idx; /* buffer to queue */
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int idx; /* buffer to queue */
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unsigned int start;
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unsigned int end;
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int discard; /* client finished with buffer? */
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int discard; /* client finished with buffer? */
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} drm_mga_indices_t;
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typedef struct drm_mga_iload {
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@ -332,12 +319,12 @@ typedef struct _drm_mga_blit {
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int src_pitch, dst_pitch;
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int delta_sx, delta_sy;
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int delta_dx, delta_dy;
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int height, ydir; /* flip image vertically */
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int height, ydir; /* flip image vertically */
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int source_pitch, dest_pitch;
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} drm_mga_blit_t;
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/* 3.1: An ioctl to get parameters that aren't available to the 3d
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* client any other way.
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* client any other way.
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*/
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#define MGA_PARAM_IRQ_NR 1
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