From 292a5d73a244cec8f4d1042c6fec6618333c1e0e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 2 Mar 2010 15:25:42 -0800 Subject: [PATCH] intel: Don't tile-align pitch for untiled buffers. This allows Mesa to use drm_intel_bo_alloc_tiled() for its tiled buffers, since it makes its decision about pitch before telling libdrm. They happen to be the same choices for the tiled case. --- intel/intel_bufmgr_gem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 38e0ed9e..9cf4095b 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -258,7 +258,7 @@ drm_intel_gem_bo_tile_pitch(drm_intel_bufmgr_gem *bufmgr_gem, unsigned long i; if (tiling_mode == I915_TILING_NONE) - return ROUND_UP_TO(pitch, tile_width); + return pitch; /* 965 is flexible */ if (bufmgr_gem->gen >= 4)