tests/amdgpu: add security test suite (v2)
This patch is to add a new test suite to store security tests. In Raven+ asics, it will support TMZ (trust memory zone), and it is page-based protection feature. v2: remove tests/amdgpu/Makefile.am and update to tests/amdgpu/meson.build Acked-by: Huang Rui <ray.huang@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Aaron Liu <aaron.liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>main
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2420768d02
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2c0e4991d7
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@ -58,6 +58,7 @@
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#define VM_TESTS_STR "VM Tests"
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#define RAS_TESTS_STR "RAS Tests"
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#define SYNCOBJ_TIMELINE_TESTS_STR "SYNCOBJ TIMELINE Tests"
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#define SECURITY_TESTS_STR "Security Tests"
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/**
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* Open handles for amdgpu devices
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@ -130,6 +131,12 @@ static CU_SuiteInfo suites[] = {
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.pCleanupFunc = suite_syncobj_timeline_tests_clean,
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.pTests = syncobj_timeline_tests,
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},
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{
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.pName = SECURITY_TESTS_STR,
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.pInitFunc = suite_security_tests_init,
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.pCleanupFunc = suite_security_tests_clean,
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.pTests = security_tests,
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},
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CU_SUITE_INFO_NULL,
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};
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@ -247,6 +247,27 @@ void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
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int hang);
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void amdgpu_memcpy_draw_hang_slow_test(amdgpu_device_handle device_handle, uint32_t ring);
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/**
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* Initialize security test suite
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*/
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int suite_security_tests_init();
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/**
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* Deinitialize security test suite
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*/
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int suite_security_tests_clean();
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/**
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* Decide if the suite is enabled by default or not.
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*/
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CU_BOOL suite_security_tests_enable(void);
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/**
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* Tests in security test suite
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*/
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extern CU_TestInfo security_tests[];
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/**
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* Helper functions
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*/
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@ -24,7 +24,7 @@ if dep_cunit.found()
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files(
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'amdgpu_test.c', 'basic_tests.c', 'bo_tests.c', 'cs_tests.c',
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'vce_tests.c', 'uvd_enc_tests.c', 'vcn_tests.c', 'deadlock_tests.c',
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'vm_tests.c', 'ras_tests.c', 'syncobj_tests.c',
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'vm_tests.c', 'ras_tests.c', 'syncobj_tests.c', 'security_tests.c',
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),
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dependencies : [dep_cunit, dep_threads, dep_atomic_ops],
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include_directories : [inc_root, inc_drm, include_directories('../../amdgpu')],
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@ -0,0 +1,96 @@
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/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "CUnit/Basic.h"
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#include "amdgpu_test.h"
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#include "amdgpu_drm.h"
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#include "amdgpu_internal.h"
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static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static void amdgpu_security_alloc_buf_test(void);
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CU_BOOL suite_security_tests_enable(void)
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{
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CU_BOOL enable = CU_TRUE;
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if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle))
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return CU_FALSE;
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if (device_handle->info.family_id < AMDGPU_FAMILY_RV) {
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printf("\n\nDon't support TMZ (trust memory zone), security suite disabled\n");
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enable = CU_FALSE;
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}
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if (amdgpu_device_deinitialize(device_handle))
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return CU_FALSE;
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return enable;
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}
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int suite_security_tests_init(void)
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{
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if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle))
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return CUE_SINIT_FAILED;
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return CUE_SUCCESS;
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}
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int suite_security_tests_clean(void)
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{
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int r;
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r = amdgpu_device_deinitialize(device_handle);
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if (r)
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return CUE_SCLEAN_FAILED;
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return CUE_SUCCESS;
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}
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CU_TestInfo security_tests[] = {
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{ "allocate secure buffer test", amdgpu_security_alloc_buf_test },
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CU_TEST_INFO_NULL,
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};
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static void amdgpu_security_alloc_buf_test(void)
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{
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amdgpu_bo_handle bo;
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amdgpu_va_handle va_handle;
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uint64_t bo_mc;
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int r;
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/* Test secure buffer allocation in VRAM */
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bo = gpu_mem_alloc(device_handle, 4096, 4096,
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_CREATE_ENCRYPTED,
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&bo_mc, &va_handle);
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r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
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CU_ASSERT_EQUAL(r, 0);
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}
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