nouveau: Also wait until CACHE1 gets emptied.
parent
7e4bb6099a
commit
2d7eb4434f
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@ -419,7 +419,9 @@ void nouveau_fifo_free(struct nouveau_channel *chan)
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/* Give the channel a chance to idle, wait 2s (hopefully) */
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t_start = engine->timer.read(dev);
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while (NV_READ(chan->get) != NV_READ(chan->put)) {
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while (NV_READ(chan->get) != NV_READ(chan->put) ||
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NV_READ(NV03_PFIFO_CACHE1_GET) !=
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NV_READ(NV03_PFIFO_CACHE1_PUT)) {
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if (engine->timer.read(dev) - t_start > 2000000000ULL) {
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DRM_ERROR("Failed to idle channel %d before destroy."
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"Prepare for strangeness..\n", chan->id);
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@ -427,6 +429,10 @@ void nouveau_fifo_free(struct nouveau_channel *chan)
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}
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}
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/*XXX: Maybe should wait for PGRAPH to finish with the stuff it fetched
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* from CACHE1 too?
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*/
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/* disable the fifo caches */
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NV_WRITE(NV03_PFIFO_CACHES, 0x00000000);
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NV_WRITE(NV04_PFIFO_CACHE1_DMA_PUSH, NV_READ(NV04_PFIFO_CACHE1_DMA_PUSH)&(~0x1));
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@ -435,6 +435,7 @@
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#define NV03_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000000f
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#define NV10_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000001f
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#define NV50_PFIFO_CACHE1_PUSH1_CHID_MASK 0x0000007f
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#define NV03_PFIFO_CACHE1_PUT 0x00003210
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#define NV04_PFIFO_CACHE1_DMA_PUSH 0x00003220
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#define NV04_PFIFO_CACHE1_DMA_FETCH 0x00003224
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# define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES 0x00000000
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