nouveau: NV47 context switching voodoo + warning
Maarten Maathuis
parent
b510517d59
commit
319436c5cc
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@ -37,6 +37,7 @@
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#define NV41_GRCTX_SIZE (92*1024)
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#define NV41_GRCTX_SIZE (92*1024)
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#define NV43_GRCTX_SIZE (70*1024)
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#define NV43_GRCTX_SIZE (70*1024)
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#define NV46_GRCTX_SIZE (70*1024) /* probably ~64KiB */
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#define NV46_GRCTX_SIZE (70*1024) /* probably ~64KiB */
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#define NV47_GRCTX_SIZE (125*1024)
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#define NV49_GRCTX_SIZE (164640)
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#define NV49_GRCTX_SIZE (164640)
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#define NV4A_GRCTX_SIZE (64*1024)
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#define NV4A_GRCTX_SIZE (64*1024)
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#define NV4B_GRCTX_SIZE (164640)
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#define NV4B_GRCTX_SIZE (164640)
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@ -565,6 +566,136 @@ nv46_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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}
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}
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/* This may only work on 7800 AGP cards, will include a warning */
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static void
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nv47_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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int i;
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INSTANCE_WR(ctx, 0x00000000/4, ctx->im_pramin->start);
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INSTANCE_WR(ctx, 0x00000024/4, 0x0000ffff);
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INSTANCE_WR(ctx, 0x00000028/4, 0x0000ffff);
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INSTANCE_WR(ctx, 0x00000030/4, 0x00000001);
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INSTANCE_WR(ctx, 0x0000011c/4, 0x20010001);
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INSTANCE_WR(ctx, 0x00000120/4, 0x0f73ef00);
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INSTANCE_WR(ctx, 0x00000128/4, 0x02008821);
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INSTANCE_WR(ctx, 0x00000178/4, 0x00000040);
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INSTANCE_WR(ctx, 0x0000017c/4, 0x00000040);
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INSTANCE_WR(ctx, 0x00000180/4, 0x00000040);
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INSTANCE_WR(ctx, 0x00000188/4, 0x00000040);
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for (i=0x00000194; i<=0x000001b0; i+=4)
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INSTANCE_WR(ctx, i/4, 0x80000000);
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INSTANCE_WR(ctx, 0x000001d0/4, 0x0b0b0b0c);
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INSTANCE_WR(ctx, 0x00000340/4, 0x00040000);
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INSTANCE_WR(ctx, 0x00000350/4, 0x55555555);
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INSTANCE_WR(ctx, 0x00000354/4, 0x55555555);
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INSTANCE_WR(ctx, 0x00000358/4, 0x55555555);
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INSTANCE_WR(ctx, 0x0000035c/4, 0x55555555);
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INSTANCE_WR(ctx, 0x00000388/4, 0x00000008);
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INSTANCE_WR(ctx, 0x0000039c/4, 0x00001010);
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for (i=0x000003c0; i<=0x000003fc; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00000111);
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INSTANCE_WR(ctx, 0x00000454/4, 0x00000111);
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INSTANCE_WR(ctx, 0x00000458/4, 0x00080060);
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INSTANCE_WR(ctx, 0x00000474/4, 0x00000080);
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INSTANCE_WR(ctx, 0x00000478/4, 0xffff0000);
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INSTANCE_WR(ctx, 0x0000047c/4, 0x00000001);
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INSTANCE_WR(ctx, 0x00000490/4, 0x46400000);
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INSTANCE_WR(ctx, 0x000004a0/4, 0xffff0000);
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for (i=0x000004a4; i<=0x000004e0; i+=4)
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INSTANCE_WR(ctx, i/4, 0x88888888);
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INSTANCE_WR(ctx, 0x000004f4/4, 0x0fff0000);
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INSTANCE_WR(ctx, 0x000004f8/4, 0x0fff0000);
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INSTANCE_WR(ctx, 0x00000500/4, 0x00011100);
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for (i=0x0000051c; i<=0x00000558; i+=4)
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INSTANCE_WR(ctx, i/4, 0x07ff0000);
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INSTANCE_WR(ctx, 0x00000564/4, 0x4b7fffff);
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INSTANCE_WR(ctx, 0x0000058c/4, 0x30201000);
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INSTANCE_WR(ctx, 0x00000590/4, 0x70605040);
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INSTANCE_WR(ctx, 0x00000594/4, 0xb8a89888);
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INSTANCE_WR(ctx, 0x00000598/4, 0xf8e8d8c8);
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INSTANCE_WR(ctx, 0x000005ac/4, 0x40100000);
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INSTANCE_WR(ctx, 0x000005c8/4, 0x0000ffff);
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INSTANCE_WR(ctx, 0x000005fc/4, 0x435185d6);
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INSTANCE_WR(ctx, 0x00000600/4, 0x2155b699);
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INSTANCE_WR(ctx, 0x00000604/4, 0xfedcba98);
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INSTANCE_WR(ctx, 0x00000608/4, 0x00000098);
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INSTANCE_WR(ctx, 0x00000618/4, 0xffffffff);
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INSTANCE_WR(ctx, 0x0000061c/4, 0x00ff7000);
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INSTANCE_WR(ctx, 0x00000620/4, 0x0000ffff);
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INSTANCE_WR(ctx, 0x00000630/4, 0x00ff0000);
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INSTANCE_WR(ctx, 0x0000066c/4, 0x00ffff00);
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for (i=0x000006b0; i<=0x000006ec; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00018488);
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for (i=0x000006f0; i<=0x0000072c; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00028202);
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for (i=0x00000770; i<=0x000007ac; i+=4)
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INSTANCE_WR(ctx, i/4, 0x0000aae4);
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for (i=0x000007b0; i<=0x000007ec; i+=4)
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INSTANCE_WR(ctx, i/4, 0x01012000);
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for (i=0x000007f0; i<=0x0000082c; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00080008);
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for (i=0x00000870; i<=0x000008ac; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00100008);
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INSTANCE_WR(ctx, 0x00000900/4, 0x0001bc80);
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INSTANCE_WR(ctx, 0x00000904/4, 0x0001bc80);
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INSTANCE_WR(ctx, 0x00000908/4, 0x0001bc80);
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INSTANCE_WR(ctx, 0x0000090c/4, 0x0001bc80);
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INSTANCE_WR(ctx, 0x00000910/4, 0x00000202);
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INSTANCE_WR(ctx, 0x00000914/4, 0x00000202);
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INSTANCE_WR(ctx, 0x00000918/4, 0x00000202);
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INSTANCE_WR(ctx, 0x0000091c/4, 0x00000202);
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for (i=0x00000930; i<=0x0000095c; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00000008);
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INSTANCE_WR(ctx, 0x00000970/4, 0x00000002);
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INSTANCE_WR(ctx, 0x000009a4/4, 0x00000021);
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INSTANCE_WR(ctx, 0x000009a8/4, 0x030c30c3);
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INSTANCE_WR(ctx, 0x000009b4/4, 0x3e020200);
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INSTANCE_WR(ctx, 0x000009b8/4, 0x00ffffff);
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INSTANCE_WR(ctx, 0x000009bc/4, 0x40103f00);
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INSTANCE_WR(ctx, 0x000009c8/4, 0x00040000);
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INSTANCE_WR(ctx, 0x00000a00/4, 0x00008100);
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INSTANCE_WR(ctx, 0x00000a8c/4, 0x00000001);
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INSTANCE_WR(ctx, 0x00000ad0/4, 0x00001001);
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INSTANCE_WR(ctx, 0x00000adc/4, 0x00000003);
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INSTANCE_WR(ctx, 0x00000ae0/4, 0x00888001);
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for (i=0x00000b10; i<=0x00000b8c; i+=4)
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INSTANCE_WR(ctx, i/4, 0xffffffff);
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INSTANCE_WR(ctx, 0x00000bb4/4, 0x00000005);
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INSTANCE_WR(ctx, 0x00000bc0/4, 0x0000ffff);
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for (i=0x00000bdc; i<=0x00000bf8; i+=4)
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INSTANCE_WR(ctx, i/4, 0x00005555);
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INSTANCE_WR(ctx, 0x00000bfc/4, 0x00000001);
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INSTANCE_WR(ctx, 0x00000c34/4, 0x00000001);
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INSTANCE_WR(ctx, 0x00000c38/4, 0x08e00001);
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INSTANCE_WR(ctx, 0x00000c3c/4, 0x000e3000);
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for (i=0x00003000; i<=0x00003078; i+=8)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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for (i=0x00004dc0; i<=0x00006fb0; i+=24)
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INSTANCE_WR(ctx, i/4, 0x00000001);
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for (i=0x00006fc0; i<=0x000073b0; i+=16)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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for (i=0x00009800; i<=0x0000b9f0; i+=24)
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INSTANCE_WR(ctx, i/4, 0x00000001);
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for (i=0x0000ba00; i<=0x00010430; i+=24)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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for (i=0x00010440; i<=0x00010830; i+=16)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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for (i=0x00012c80; i<=0x00014e70; i+=24)
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INSTANCE_WR(ctx, i/4, 0x00000001);
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for (i=0x00014e80; i<=0x00015270; i+=16)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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for (i=0x000176c0; i<=0x000198b0; i+=24)
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INSTANCE_WR(ctx, i/4, 0x00000001);
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for (i=0x000198c0; i<=0x00019cb0; i+=16)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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for (i=0x0001c100; i<=0x0001e2f0; i+=24)
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INSTANCE_WR(ctx, i/4, 0x00000001);
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for (i=0x0001e300; i<=0x0001e6f0; i+=16)
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INSTANCE_WR(ctx, i/4, 0x3f800000);
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}
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static void
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static void
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nv49_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
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nv49_graph_context_init(struct drm_device *dev, struct nouveau_gpuobj *ctx)
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{
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{
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@ -1361,6 +1492,11 @@ nv40_graph_create_context(struct nouveau_channel *chan)
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ctx_size = NV46_GRCTX_SIZE;
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ctx_size = NV46_GRCTX_SIZE;
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ctx_init = nv46_graph_context_init;
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ctx_init = nv46_graph_context_init;
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break;
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break;
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case 0x47:
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DRM_INFO("NV47 warning: If your card behaves strangely, please come to the irc channel\n");
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ctx_size = NV47_GRCTX_SIZE;
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ctx_init = nv47_graph_context_init;
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break;
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case 0x49:
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case 0x49:
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ctx_size = NV49_GRCTX_SIZE;
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ctx_size = NV49_GRCTX_SIZE;
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ctx_init = nv49_graph_context_init;
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ctx_init = nv49_graph_context_init;
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@ -1675,6 +1811,38 @@ static uint32_t nv46_ctx_voodoo[] = {
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0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
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0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0
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};
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};
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static uint32_t nv47_ctx_voodoo[] = {
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0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001,
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0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409265, 0x00409606,
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0x0040a368, 0x0040198f, 0x00200001, 0x0060000a, 0x00700080, 0x00104042,
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0x00200001, 0x0060000a, 0x00700000, 0x001040c5, 0x00401826, 0x00401968,
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0x0060000d, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080,
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0x004020e6, 0x007000a0, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d,
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0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4,
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0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e,
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0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143,
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0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d12,
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0x00500060, 0x00403f87, 0x0060000d, 0x00407ce6, 0x002000f0, 0x0060000a,
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0x00200020, 0x00100620, 0x00154650, 0x00104668, 0x0017466d, 0x0011068b,
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0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6,
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0x00200022, 0x001006cc, 0x001246f0, 0x002000c0, 0x00100700, 0x0010c3d7,
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0x001043e1, 0x00500060, 0x00200268, 0x0060000a, 0x00104800, 0x00108901,
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0x00124920, 0x0020001f, 0x00100940, 0x00140965, 0x00144a00, 0x00104a19,
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0x0010ca1c, 0x00110b00, 0x00200028, 0x00100b08, 0x00134c2e, 0x0010cd00,
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0x0010cd04, 0x00120d08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00,
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0x00104f06, 0x00105406, 0x00105709, 0x00200318, 0x0060000a, 0x00300000,
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0x00200680, 0x00407500, 0x00200684, 0x00800001, 0x00200b60, 0x0060000a,
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0x00209540, 0x00407b8a, 0x00201350, 0x00800041, 0x00408c00, 0x00600006,
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0x004088e6, 0x00700080, 0x0020007a, 0x0060000a, 0x00104280, 0x00200318,
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0x0060000a, 0x00200004, 0x00800001, 0x00700000, 0x00200000, 0x0060000a,
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0x00106002, 0x0040a368, 0x00700000, 0x00200000, 0x0060000a, 0x00106002,
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0x00700080, 0x00400a68, 0x00500060, 0x00600007, 0x00409688, 0x0060000f,
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0x00500060, 0x00200000, 0x0060000a, 0x00700000, 0x00106001, 0x0091a880,
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0x00901ffe, 0x10940000, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c,
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0x00402168, 0x0040a506, 0x0040a605, 0x00600009, 0x00700005, 0x00700006,
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0x0060000e, ~0
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};
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//this is used for nv49 and nv4b
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//this is used for nv49 and nv4b
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static uint32_t nv49_4b_ctx_voodoo[] ={
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static uint32_t nv49_4b_ctx_voodoo[] ={
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0x00400564, 0x00400505, 0x00408165, 0x00408206, 0x00409e68, 0x00200020,
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0x00400564, 0x00400505, 0x00408165, 0x00408206, 0x00409e68, 0x00200020,
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@ -1835,6 +2003,7 @@ nv40_graph_init(struct drm_device *dev)
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case 0x43: ctx_voodoo = nv43_ctx_voodoo; break;
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case 0x43: ctx_voodoo = nv43_ctx_voodoo; break;
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case 0x44: ctx_voodoo = nv44_ctx_voodoo; break;
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case 0x44: ctx_voodoo = nv44_ctx_voodoo; break;
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case 0x46: ctx_voodoo = nv46_ctx_voodoo; break;
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case 0x46: ctx_voodoo = nv46_ctx_voodoo; break;
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case 0x47: ctx_voodoo = nv47_ctx_voodoo; break;
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case 0x49: ctx_voodoo = nv49_4b_ctx_voodoo; break;
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case 0x49: ctx_voodoo = nv49_4b_ctx_voodoo; break;
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case 0x4a: ctx_voodoo = nv4a_ctx_voodoo; break;
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case 0x4a: ctx_voodoo = nv4a_ctx_voodoo; break;
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case 0x4b: ctx_voodoo = nv49_4b_ctx_voodoo; break;
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case 0x4b: ctx_voodoo = nv49_4b_ctx_voodoo; break;
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