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add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear filtering on 

r200
main
Roland Scheidegger 2005-03-15 22:12:30 +00:00
parent d2fd920095
commit 34563921dd
7 changed files with 21 additions and 7 deletions
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3
shared-core/radeon_drm.h
View File

@ -151,7 +151,8 @@
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81
#define RADEON_EMIT_PP_CUBIC_FACES_2 82
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83
#define RADEON_MAX_STATE_PACKETS 84
#define R200_EMIT_PP_TRI_PERF_CNTL 84
#define RADEON_MAX_STATE_PACKETS 85
/* Commands understood by cmd_buffer ioctl. More can be added but
* obviously these can't be removed or changed:

8
shared-core/radeon_drv.h
View File

@ -42,7 +42,7 @@
#define DRIVER_NAME "radeon"
#define DRIVER_DESC "ATI Radeon"
#define DRIVER_DATE "20050208"
#define DRIVER_DATE "20050311"
/* Interface history:
*
@ -84,10 +84,12 @@
* - Add R100/R200 surface allocation/free support
* 1.15- Add support for texture micro tiling
* - Add support for r100 cube maps
* 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear
* texture filtering on r200
*/
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 15
#define DRIVER_MINOR 16
#define DRIVER_PATCHLEVEL 0
enum radeon_family {
@ -827,6 +829,8 @@ extern void radeon_driver_free_filp_priv(drm_device_t * dev,
#define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4
#define R200_PP_TRI_PERF 0x2cf8
/* Constants */
#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */

4
shared-core/radeon_state.c
View File

@ -209,6 +209,7 @@ static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
case RADEON_EMIT_PP_CUBIC_FACES_0:
case RADEON_EMIT_PP_CUBIC_FACES_1:
case RADEON_EMIT_PP_CUBIC_FACES_2:
case R200_EMIT_PP_TRI_PERF_CNTL:
/* These packets don't contain memory offsets */
break;
@ -581,7 +582,8 @@ static struct {
RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, {
RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, {
RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, {
RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"},
RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, {
R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"},
};
/* ================================================================

6
shared/radeon.h
View File

@ -42,10 +42,10 @@
#define DRIVER_NAME "radeon"
#define DRIVER_DESC "ATI Radeon"
#define DRIVER_DATE "20050208"
#define DRIVER_DATE "20050311"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 15
#define DRIVER_MINOR 16
#define DRIVER_PATCHLEVEL 0
/* Interface history:
@ -88,6 +88,8 @@
* - Add R100/R200 surface allocation/free support
* 1.15- Add support for texture micro tiling
* - Add support for r100 cube maps
* 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear
* texture filtering on r200
*/
#define DRIVER_IOCTLS \
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { radeon_cp_buffers, 1, 0 }, \

3
shared/radeon_drm.h
View File

@ -152,7 +152,8 @@
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81
#define RADEON_EMIT_PP_CUBIC_FACES_2 82
#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83
#define RADEON_MAX_STATE_PACKETS 84
#define R200_EMIT_PP_TRI_PERF_CNTL 84
#define RADEON_MAX_STATE_PACKETS 85
/* Commands understood by cmd_buffer ioctl. More can be added but

2
shared/radeon_drv.h
View File

@ -787,6 +787,8 @@ extern void radeon_driver_irq_uninstall( drm_device_t *dev );
#define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4
#define R200_PP_TRI_PERF 0x2cf8
/* Constants */
#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */

2
shared/radeon_state.c
View File

@ -207,6 +207,7 @@ static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_
case RADEON_EMIT_PP_CUBIC_FACES_0:
case RADEON_EMIT_PP_CUBIC_FACES_1:
case RADEON_EMIT_PP_CUBIC_FACES_2:
case R200_EMIT_PP_TRI_PERF_CNTL:
/* These packets don't contain memory offsets */
break;
@ -567,6 +568,7 @@ static struct {
{ RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"},
{ RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"},
{ RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"},
{ R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"},
};