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fix various typos 

Saw a couple of typos fixes in the patch DragonFlyBSD carries [1], so
I ran codespell (a spell checker for code) on the whole repo.

[1] https://github.com/DragonFlyBSD/DPorts/blob/master/graphics/libdrm/files/patch-xf86drm.c

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
main
Eric Engestrom 2018-12-19 14:55:45 +00:00 committed by Emil Velikov
parent ad8bec1ed8
commit 360292c7ab
21 changed files with 36 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
amdgpu/amdgpu.h
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@ -702,7 +702,7 @@ int amdgpu_find_bo_by_cpu_mapping(amdgpu_device_handle dev,
uint64_t *offset_in_bo);
/**
* Free previosuly allocated memory
* Free previously allocated memory
*
* \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
* \param buf_handle - \c [in] Buffer handle to free
@ -732,7 +732,7 @@ int amdgpu_bo_free(amdgpu_bo_handle buf_handle);
void amdgpu_bo_inc_ref(amdgpu_bo_handle bo);
/**
* Request CPU access to GPU accessable memory
* Request CPU access to GPU accessible memory
*
* \param buf_handle - \c [in] Buffer handle
* \param cpu - \c [out] CPU address to be used for access
@ -1263,7 +1263,7 @@ int amdgpu_read_mm_registers(amdgpu_device_handle dev, unsigned dword_offset,
* \notes \n
* It is client responsibility to correctly handle VA assignments and usage.
* Neither kernel driver nor libdrm_amdpgu are able to prevent and
* detect wrong va assignemnt.
* detect wrong va assignment.
*
* It is client responsibility to correctly handle multi-GPU cases and to pass
* the corresponding arrays of all devices handles where corresponding VA will

2
etnaviv/etnaviv_priv.h
View File

@ -150,7 +150,7 @@ struct etna_cmd_stream_priv {
struct etna_bo **bos;
uint32_t nr_bos, max_bos;
/* notify callback if buffer reset happend */
/* notify callback if buffer reset happened */
void (*reset_notify)(struct etna_cmd_stream *stream, void *priv);
void *reset_notify_priv;
};

2
exynos/exynos_drm.c
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@ -276,7 +276,7 @@ drm_public uint32_t exynos_bo_handle(struct exynos_bo *bo)
* @bo: a exynos buffer object including a gem object handle to be mmapped
* to user space.
*
* if true, user pointer mmaped else NULL.
* if true, user pointer mmapped else NULL.
*/
drm_public void *exynos_bo_map(struct exynos_bo *bo)
{

2
exynos/exynos_drm.h
View File

@ -64,7 +64,7 @@ struct drm_exynos_gem_info {
/**
* A structure for user connection request of virtual display.
*
* @connection: indicate whether doing connetion or not by user.
* @connection: indicate whether doing connection or not by user.
* @extensions: if this value is 1 then the vidi driver would need additional
* 128bytes edid data.
* @edid: the edid data pointer from user side.

2
exynos/exynos_drmif.h
View File

@ -46,7 +46,7 @@ struct exynos_device {
* @handle: a gem handle to gem object created.
* @flags: indicate memory allocation and cache attribute types.
* @size: size to the buffer created.
* @vaddr: user space address to a gem buffer mmaped.
* @vaddr: user space address to a gem buffer mmapped.
* @name: a gem global handle from flink request.
*/
struct exynos_bo {

2
freedreno/kgsl/README
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@ -1,4 +1,4 @@
This is a historical discription of what is now the kgsl backend
This is a historical description of what is now the kgsl backend
in libdrm freedreno (before the upstream drm/msm driver). Note
that the kgsl backend requires the "kgsl-drm" shim driver, which
usually is in disrepair (QCOM does not build it for android), and

2
freedreno/msm/msm_ringbuffer.c
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@ -74,7 +74,7 @@ struct msm_ringbuffer {
/* should have matching entries in submit.cmds: */
DECLARE_ARRAY(struct msm_cmd *, cmds);
/* List of physical cmdstream buffers (msm_cmd) assocated with this
/* List of physical cmdstream buffers (msm_cmd) associated with this
* logical fd_ringbuffer.
*
* Note that this is different from msm_ringbuffer::cmds (which

4
include/drm/amdgpu_drm.h
View File

@ -204,9 +204,9 @@ union drm_amdgpu_bo_list {
/* unknown cause */
#define AMDGPU_CTX_UNKNOWN_RESET 3
/* indicate gpu reset occured after ctx created */
/* indicate gpu reset occurred after ctx created */
#define AMDGPU_CTX_QUERY2_FLAGS_RESET (1<<0)
/* indicate vram lost occured after ctx created */
/* indicate vram lost occurred after ctx created */
#define AMDGPU_CTX_QUERY2_FLAGS_VRAMLOST (1<<1)
/* indicate some job from this context once cause gpu hang */
#define AMDGPU_CTX_QUERY2_FLAGS_GUILTY (1<<2)

2
include/drm/drm_fourcc.h
View File

@ -381,7 +381,7 @@ extern "C" {
* This is a tiled layout using 4Kb tiles in row-major layout.
* Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
* are arranged in four groups (two wide, two high) with column-major layout.
* Each group therefore consits out of four 256 byte units, which are also laid
* Each group therefore consists out of four 256 byte units, which are also laid
* out as 2x2 column-major.
* 256 byte units are made out of four 64 byte blocks of pixels, producing
* either a square block or a 2:1 unit.

2
include/drm/drm_mode.h
View File

@ -402,7 +402,7 @@ struct drm_mode_get_connector {
/* the PROP_ATOMIC flag is used to hide properties from userspace that
* is not aware of atomic properties. This is mostly to work around
* older userspace (DDX drivers) that read/write each prop they find,
* witout being aware that this could be triggering a lengthy modeset.
* without being aware that this could be triggering a lengthy modeset.
*/
#define DRM_MODE_PROP_ATOMIC 0x80000000

4
include/drm/i915_drm.h
View File

@ -520,7 +520,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_EXEC_FENCE 44
/* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to capture
* user specified bufffers for post-mortem debugging of GPU hangs. See
* user specified buffers for post-mortem debugging of GPU hangs. See
* EXEC_OBJECT_CAPTURE.
*/
#define I915_PARAM_HAS_EXEC_CAPTURE 45
@ -1220,7 +1220,7 @@ struct drm_i915_gem_caching {
__u32 handle;
/**
* Cacheing level to apply or return value
* Caching level to apply or return value
*
* bits0-15 are for generic caching control (i.e. the above defined
* values). bits16-31 are reserved for platform-specific variations

6
include/drm/vmwgfx_drm.h
View File

@ -361,7 +361,7 @@ struct drm_vmw_fence_rep {
* Allocate a DMA buffer that is visible also to the host.
* NOTE: The buffer is
* identified by a handle and an offset, which are private to the guest, but
* useable in the command stream. The guest kernel may translate these
* usable in the command stream. The guest kernel may translate these
* and patch up the command stream accordingly. In the future, the offset may
* be zero at all times, or it may disappear from the interface before it is
* fixed.
@ -446,7 +446,7 @@ struct drm_vmw_unref_dmabuf_arg {
*
* This IOCTL controls the overlay units of the svga device.
* The SVGA overlay units does not work like regular hardware units in
* that they do not automaticaly read back the contents of the given dma
* that they do not automatically read back the contents of the given dma
* buffer. But instead only read back for each call to this ioctl, and
* at any point between this call being made and a following call that
* either changes the buffer or disables the stream.
@ -1035,7 +1035,7 @@ union drm_vmw_gb_surface_reference_arg {
* for read-only.
* @drm_vmw_synccpu_write: Sync for write. Block all command submissions
* referencing this buffer.
* @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return
* @drm_vmw_synccpu_dontblock: Don't wait for GPU idle, but rather return
* -EBUSY should the buffer be busy.
* @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer
* while the buffer is synced for CPU. This is similar to the GEM bo idle

2
intel/intel_bufmgr_priv.h
View File

@ -156,7 +156,7 @@ struct _drm_intel_bufmgr {
* address range (2^48).
*
* Any resource used with flat/heapless (0x00000000-0xfffff000)
* General State Heap (GSH) or Intructions State Heap (ISH) must
* General State Heap (GSH) or Instructions State Heap (ISH) must
* be in a 32-bit range. 48-bit range will only be used when explicitly
* requested.
*

2
intel/mm.h
View File

@ -73,7 +73,7 @@ drm_private extern int mmFreeMem(struct mem_block *b);
drm_private extern void mmDestroy(struct mem_block *mmInit);
/**
* For debuging purpose.
* For debugging purpose.
*/
drm_private extern void mmDumpMemInfo(const struct mem_block *mmInit);

2
libkms/libkms.pc.in
View File

@ -4,7 +4,7 @@ libdir=@libdir@
includedir=@includedir@
Name: libkms
Description: Library that abstract aways the different mm interface for kernel drivers
Description: Library that abstracts away the different mm interface for kernel drivers
Version: 1.0.0
Libs: -L${libdir} -lkms
Cflags: -I${includedir}/libkms

4
man/drm.xml
View File

@ -49,7 +49,7 @@
applications.</para>
<para>In earlier days, the kernel framework was solely used to provide raw
hardware access to priviledged user-space processes which implement
hardware access to privileged user-space processes which implement
all the hardware abstraction layers. But more and more tasks were
moved into the kernel. All these interfaces are based on
<citerefentry><refentrytitle>ioctl</refentrytitle><manvolnum>2</manvolnum></citerefentry>
@ -64,7 +64,7 @@
<citerefentry><refentrytitle>open</refentrytitle><manvolnum>2</manvolnum></citerefentry>
and
<citerefentry><refentrytitle>close</refentrytitle><manvolnum>2</manvolnum></citerefentry>.
However, it still depends on the grapics driver which interfaces are
However, it still depends on the graphics driver which interfaces are
available on these devices. If an interface is not available, the
syscalls will fail with <literal>EINVAL</literal>.</para>

2
meson.build
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@ -157,7 +157,7 @@ if _vc4 != 'false'
with_vc4 = _vc4 == 'true' or ['arm', 'aarch64'].contains(host_machine.cpu_family())
endif
# XXX: Aparently only freebsd and dragonfly bsd actually need this (and
# XXX: Apparently only freebsd and dragonfly bsd actually need this (and
# gnu/kfreebsd), not openbsd and netbsd
with_libkms = false
_libkms = get_option('libkms')

4
tests/amdgpu/amdgpu_test.c
View File

@ -245,7 +245,7 @@ static const char usage[] =
static const char options[] = "hlrps:t:b:d:f";
/* Open AMD devices.
* Return the number of AMD device openned.
* Return the number of AMD device opened.
*/
static int amdgpu_open_devices(int open_render_node)
{
@ -333,7 +333,7 @@ static void amdgpu_print_devices()
int i;
drmDevicePtr device;
/* Open the first AMD devcie to print driver information. */
/* Open the first AMD device to print driver information. */
if (drm_amdgpu[0] >=0) {
/* Display AMD driver version information.*/
drmVersionPtr retval = drmGetVersion(drm_amdgpu[0]);

4
tests/ttmtest/src/xf86dristr.h
View File

@ -42,8 +42,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define XF86DRINAME "XFree86-DRI"
/* The DRI version number. This was originally set to be the same of the
* XFree86 version number. However, this version is really indepedent of
/* The DRI version number. This was originally set to be the same as the
* XFree86 version number. However, this version is really independent of
* the XFree86 version.
*
* Version History:

6
xf86drm.c
View File

@ -179,7 +179,7 @@ drm_public void drmFree(void *pt)
}
/**
* Call ioctl, restarting if it is interupted
* Call ioctl, restarting if it is interrupted
*/
drm_public int
drmIoctl(int fd, unsigned long request, void *arg)
@ -289,7 +289,7 @@ static int drmMatchBusID(const char *id1, const char *id2, int pci_domain_ok)
*
* \internal
* Checks for failure. If failure was caused by signal call chown again.
* If any other failure happened then it will output error mesage using
* If any other failure happened then it will output error message using
* drmMsg() call.
*/
#if !UDEV
@ -1481,7 +1481,7 @@ drm_public int drmDMA(int fd, drmDMAReqPtr request)
*
* \param fd file descriptor.
* \param context context.
* \param flags flags that determine the sate of the hardware when the function
* \param flags flags that determine the state of the hardware when the function
* returns.
*
* \return always zero.

10
xf86drmMode.h
View File

@ -49,12 +49,12 @@ extern "C" {
* header defining uint32_t, int32_t and uint16_t.
*
* It aims to provide a randr1.2 compatible interface for modesettings in the
* kernel, the interface is also ment to be used by libraries like EGL.
* kernel, the interface is also meant to be used by libraries like EGL.
*
* More information can be found in randrproto.txt which can be found here:
* http://gitweb.freedesktop.org/?p=xorg/proto/randrproto.git
*
* There are some major diffrences to be noted. Unlike the randr1.2 proto you
* There are some major differences to be noted. Unlike the randr1.2 proto you
* need to create the memory object of the framebuffer yourself with the ttm
* buffer object interface. This object needs to be pinned.
*/
@ -348,7 +348,7 @@ extern void drmModeFreePlane( drmModePlanePtr ptr );
extern void drmModeFreePlaneResources(drmModePlaneResPtr ptr);
/**
* Retrives all of the resources associated with a card.
* Retrieves all of the resources associated with a card.
*/
extern drmModeResPtr drmModeGetResources(int fd);
@ -357,7 +357,7 @@ extern drmModeResPtr drmModeGetResources(int fd);
*/
/**
* Retrive information about framebuffer bufferId
* Retrieve information about framebuffer bufferId
*/
extern drmModeFBPtr drmModeGetFB(int fd, uint32_t bufferId);
@ -397,7 +397,7 @@ extern int drmModeDirtyFB(int fd, uint32_t bufferId,
*/
/**
* Retrive information about the ctrt crtcId
* Retrieve information about the ctrt crtcId
*/
extern drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId);