Apply patch from Alan Hourihane to temporarily allow compilation on Alpha
(the driver has not been tested on Alpha -- this just makes it compile)main
parent
ac3c3571a7
commit
37643234af
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@ -82,6 +82,7 @@ static void mga_delay(void)
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return;
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}
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#ifdef __i386__
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void mga_flush_write_combine(void)
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{
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int xchangeDummy;
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@ -92,6 +93,7 @@ void mga_flush_write_combine(void)
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" movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;"
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" pop %%eax" : /* no outputs */ : /* no inputs */ );
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}
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#endif
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/* These are two age tags that will never be sent to
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* the hardware */
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@ -427,7 +429,9 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
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}
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}
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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atomic_inc(&dev_priv->pending_bufs);
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MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
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MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
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@ -824,7 +828,9 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
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* the status register will be correct
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*/
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
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MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |
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@ -820,7 +820,9 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
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mga_dma_dispatch_clear(dev, clear.flags,
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clear.clear_color, clear.clear_depth);
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PRIMUPDATE(dev_priv);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -850,7 +852,9 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
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PRIMUPDATE(dev_priv);
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set_bit(MGA_BUF_SWAP_PENDING,
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&dev_priv->current_prim->buffer_status);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -898,7 +902,9 @@ int mga_iload(struct inode *inode, struct file *filp,
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AGEBUF(dev_priv, buf_priv);
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buf_priv->discard = 1;
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mga_freelist_put(dev, buf);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -946,7 +952,9 @@ int mga_vertex(struct inode *inode, struct file *filp,
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mga_dma_dispatch_vertex(dev, buf);
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PRIMUPDATE(dev_priv);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -993,7 +1001,9 @@ int mga_indices(struct inode *inode, struct file *filp,
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mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
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PRIMUPDATE(dev_priv);
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#ifdef __i386__
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mga_flush_write_combine();
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#endif
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mga_dma_schedule(dev, 1);
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return 0;
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}
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@ -68,6 +68,7 @@ int R128_READ_PLL(drm_device_t *dev, int addr)
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return R128_READ(R128_CLOCK_CNTL_DATA);
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}
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#ifdef __i386__
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static void r128_flush_write_combine(void)
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{
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int xchangeDummy;
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@ -86,6 +87,7 @@ static void r128_flush_write_combine(void)
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"pop %%ebx ;"
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"pop %%eax" : /* no outputs */ : /* no inputs */ );
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}
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#endif
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static void r128_status(drm_device_t *dev)
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{
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@ -496,8 +498,10 @@ static int r128_submit_packets_ring_secure(drm_device_t *dev,
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dev_priv->ring_start,
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write * sizeof(u32));
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#ifdef __i386__
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/* Make sure WC cache has been flushed */
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r128_flush_write_combine();
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#endif
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dev_priv->sarea_priv->ring_write = write;
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R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
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@ -599,8 +603,10 @@ static int r128_submit_packets_ring(drm_device_t *dev,
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dev_priv->ring_start,
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write * sizeof(u32));
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#ifdef __i386__
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/* Make sure WC cache has been flushed */
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r128_flush_write_combine();
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#endif
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dev_priv->sarea_priv->ring_write = write;
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R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
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@ -766,8 +772,10 @@ static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v)
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r128_mark_vertbufs_done(dev);
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}
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#ifdef __i386__
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/* Make sure WC cache has been flushed (if in PIO mode) */
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if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine();
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#endif
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/* FIXME: Add support for sending vertex buffer to the CCE here
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instead of in client code. The v->prim holds the primitive
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