drm: add tests/amdgpu (v3)
This adds some basic unit tests for the new amdgpu driver.
v2: use common util_math.h
v3: implement suggestions from Emil
replace malloc/memset with calloc
make header guards all caps
use posix_memalign rather than mem_align
replace malloc with calloc for pm4 allocations
make CU_SuiteInfo static
fix Makefile.am
fix fd numbering
use drmGetVersion/drmFreeVersion rather than open coding it
close fd, clean up CU registry on error
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
main
Alex Deucher
parent
0936139536
commit
3c5fe78801
23
configure.ac
23
configure.ac
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@ -362,6 +362,28 @@ fi
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AM_CONDITIONAL(HAVE_AMDGPU, [test "x$AMDGPU" = xyes])
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if test "x$AMDGPU" = xyes; then
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AC_DEFINE(HAVE_AMDGPU, 1, [Have amdgpu support])
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# Detect cunit library
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PKG_CHECK_MODULES([CUNIT], [cunit >= 2.1], [have_cunit=yes], [have_cunit=no])
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# If pkg-config does not find cunit, check it using AC_CHECK_LIB. We
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# do this because Debian (Ubuntu) lacks pkg-config file for cunit.
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if test "x${have_cunit}" = "xno"; then
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AC_CHECK_LIB([cunit], [CU_initialize_registry], [have_cunit=yes], [have_cunit=no])
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if test "x${have_cunit}" = "xyes"; then
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CUNIT_LIBS="-lcunit"
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CUNIT_CFLAGS=""
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AC_SUBST([CUNIT_LIBS])
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AC_SUBST([CUNIT_CFLAGS])
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fi
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fi
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AM_CONDITIONAL(HAVE_CUNIT, [test "x$have_cunit" != "xno"])
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AC_DEFINE(HAVE_CUNIT, [test "x$have_cunit" != "xno"], [Enable CUNIT Have amdgpu support])
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if test "x$have_cunit" = "xno"; then
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AC_MSG_WARN([Could not find cunit library. Disabling amdgpu tests])
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fi
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fi
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AM_CONDITIONAL(HAVE_TEGRA, [test "x$TEGRA" = xyes])
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@ -480,6 +502,7 @@ AC_CONFIG_FILES([
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tests/kmstest/Makefile
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tests/proptest/Makefile
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tests/radeon/Makefile
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tests/amdgpu/Makefile
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tests/vbltest/Makefile
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tests/exynos/Makefile
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tests/tegra/Makefile
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@ -8,6 +8,12 @@ if HAVE_RADEON
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SUBDIRS += radeon
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endif
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if HAVE_AMDGPU
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if HAVE_CUNIT
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SUBDIRS += amdgpu
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endif
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endif
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if HAVE_EXYNOS
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SUBDIRS += exynos
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endif
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@ -0,0 +1,26 @@
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AM_CFLAGS = \
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-I $(top_srcdir)/include/drm \
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-I $(top_srcdir)/amdgpu \
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-I $(top_srcdir)
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LDADD = $(top_builddir)/libdrm.la \
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$(top_builddir)/amdgpu/libdrm_amdgpu.la \
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$(CUNIT_LIBS)
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if HAVE_INSTALL_TESTS
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bin_PROGRAMS = \
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amdgpu_test
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else
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noinst_PROGRAMS = \
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amdgpu_test
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endif
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amdgpu_test_CPPFLAGS = $(CUNIT_CFLAGS)
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amdgpu_test_SOURCES = \
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amdgpu_test.c \
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amdgpu_test.h \
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basic_tests.c \
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bo_tests.c \
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cs_tests.c \
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uvd_messages.h
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@ -0,0 +1,220 @@
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <string.h>
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#include <ctype.h>
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#include <fcntl.h>
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#include <errno.h>
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#include <signal.h>
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#include <time.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/ioctl.h>
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#include <sys/time.h>
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#include <stdarg.h>
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#include <stdint.h>
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#include "drm.h"
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#include "xf86drmMode.h"
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#include "xf86drm.h"
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#include "CUnit/Basic.h"
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#include "amdgpu_test.h"
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/**
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* Open handles for amdgpu devices
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*
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*/
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int drm_amdgpu[MAX_CARDS_SUPPORTED];
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/** The table of all known test suites to run */
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static CU_SuiteInfo suites[] = {
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{ "Basic Tests", suite_basic_tests_init,
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suite_basic_tests_clean, basic_tests },
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{ "BO Tests", suite_bo_tests_init,
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suite_bo_tests_clean, bo_tests },
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{ "CS Tests", suite_cs_tests_init,
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suite_cs_tests_clean, cs_tests },
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CU_SUITE_INFO_NULL,
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};
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/** Display information about all suites and their tests */
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static void display_test_suites(void)
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{
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int iSuite;
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int iTest;
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printf("Suites\n");
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for (iSuite = 0; suites[iSuite].pName != NULL; iSuite++) {
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printf("Suite id = %d: Name '%s'\n",
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iSuite + 1, suites[iSuite].pName);
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for (iTest = 0; suites[iSuite].pTests[iTest].pName != NULL;
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iTest++) {
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printf(" Test id %d: Name: '%s'\n", iTest + 1,
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suites[iSuite].pTests[iTest].pName);
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}
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}
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}
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/** Help string for command line parameters */
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static const char usage[] = "Usage: %s [-hl] [<-s <suite id>> [-t <test id>]]\n"
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"where:\n"
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" l - Display all suites and their tests\n"
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" h - Display this help\n";
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/** Specified options strings for getopt */
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static const char options[] = "hls:t:";
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/* The main() function for setting up and running the tests.
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* Returns a CUE_SUCCESS on successful running, another
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* CUnit error code on failure.
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*/
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int main(int argc, char **argv)
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{
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int c; /* Character received from getopt */
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int i = 0;
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int suite_id = -1; /* By default run everything */
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int test_id = -1; /* By default run all tests in the suite */
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CU_pSuite pSuite = NULL;
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CU_pTest pTest = NULL;
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int aval = drmAvailable();
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if (aval == 0) {
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fprintf(stderr, "DRM driver is not available\n");
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exit(EXIT_FAILURE);
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}
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for (i = 0; i < MAX_CARDS_SUPPORTED; i++)
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drm_amdgpu[i] = -1;
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/* Parse command line string */
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opterr = 0; /* Do not print error messages from getopt */
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while ((c = getopt(argc, argv, options)) != -1) {
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switch (c) {
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case 'l':
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display_test_suites();
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exit(EXIT_SUCCESS);
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case 's':
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suite_id = atoi(optarg);
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break;
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case 't':
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test_id = atoi(optarg);
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break;
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case '?':
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case 'h':
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fprintf(stderr, usage, argv[0]);
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exit(EXIT_SUCCESS);
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default:
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fprintf(stderr, usage, argv[0]);
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exit(EXIT_FAILURE);
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}
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}
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/* Try to open all possible radeon connections
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* Right now: Open only the 0.
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*/
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printf("Try to open the card 0..\n");
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drm_amdgpu[0] = open("/dev/dri/card0", O_RDWR | O_CLOEXEC);
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if (drm_amdgpu[0] < 0) {
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perror("Cannot open /dev/dri/card0\n");
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exit(EXIT_FAILURE);
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}
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/** Display version of DRM driver */
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drmVersionPtr retval = drmGetVersion(drm_amdgpu[0]);
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if (retval == NULL) {
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perror("Could not get information about DRM driver");
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exit(EXIT_FAILURE);
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}
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printf("DRM Driver: Name: [%s] : Date [%s] : Description [%s]\n",
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retval->name, retval->date, retval->desc);
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drmFreeVersion(retval);
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/* Initialize test suites to run */
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/* initialize the CUnit test registry */
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if (CUE_SUCCESS != CU_initialize_registry()) {
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close(drm_amdgpu[0]);
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return CU_get_error();
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}
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/* Register suites. */
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if (CU_register_suites(suites) != CUE_SUCCESS) {
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fprintf(stderr, "suite registration failed - %s\n",
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CU_get_error_msg());
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CU_cleanup_registry();
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close(drm_amdgpu[0]);
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exit(EXIT_FAILURE);
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}
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/* Run tests using the CUnit Basic interface */
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CU_basic_set_mode(CU_BRM_VERBOSE);
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if (suite_id != -1) { /* If user specify particular suite? */
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pSuite = CU_get_suite_by_index((unsigned int) suite_id,
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CU_get_registry());
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if (pSuite) {
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if (test_id != -1) { /* If user specify test id */
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pTest = CU_get_test_by_index(
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(unsigned int) test_id,
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pSuite);
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if (pTest)
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CU_basic_run_test(pSuite, pTest);
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else {
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fprintf(stderr, "Invalid test id: %d\n",
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test_id);
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CU_cleanup_registry();
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close(drm_amdgpu[0]);
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exit(EXIT_FAILURE);
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}
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} else
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CU_basic_run_suite(pSuite);
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} else {
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fprintf(stderr, "Invalid suite id : %d\n",
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suite_id);
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CU_cleanup_registry();
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close(drm_amdgpu[0]);
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exit(EXIT_FAILURE);
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}
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} else
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CU_basic_run_tests();
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CU_cleanup_registry();
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close(drm_amdgpu[0]);
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return CU_get_error();
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}
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@ -0,0 +1,119 @@
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef _AMDGPU_TEST_H_
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#define _AMDGPU_TEST_H_
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#include "amdgpu.h"
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/**
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* Define max. number of card in system which we are able to handle
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*/
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#define MAX_CARDS_SUPPORTED 4
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/* Forward reference for array to keep "drm" handles */
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extern int drm_amdgpu[MAX_CARDS_SUPPORTED];
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/************************* Basic test suite ********************************/
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/*
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* Define basic test suite to serve as the starting point for future testing
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*/
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/**
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* Initialize basic test suite
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*/
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int suite_basic_tests_init();
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/**
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* Deinitialize basic test suite
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*/
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int suite_basic_tests_clean();
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/**
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* Tests in basic test suite
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*/
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extern CU_TestInfo basic_tests[];
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/**
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* Initialize bo test suite
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*/
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int suite_bo_tests_init();
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/**
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* Deinitialize bo test suite
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*/
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int suite_bo_tests_clean();
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/**
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* Tests in bo test suite
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*/
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extern CU_TestInfo bo_tests[];
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/**
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* Initialize cs test suite
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*/
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int suite_cs_tests_init();
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/**
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* Deinitialize cs test suite
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*/
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int suite_cs_tests_clean();
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/**
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* Tests in cs test suite
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*/
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extern CU_TestInfo cs_tests[];
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/**
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* Helper functions
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*/
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static inline amdgpu_bo_handle gpu_mem_alloc(
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amdgpu_device_handle device_handle,
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uint64_t size,
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uint64_t alignment,
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uint32_t type,
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uint64_t flags,
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uint64_t *vmc_addr)
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{
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struct amdgpu_bo_alloc_request req = {0};
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struct amdgpu_bo_alloc_result res = {0};
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int r;
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CU_ASSERT_NOT_EQUAL(vmc_addr, NULL);
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req.alloc_size = size;
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req.phys_alignment = alignment;
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req.preferred_heap = type;
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req.flags = flags;
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r = amdgpu_bo_alloc(device_handle, &req, &res);
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CU_ASSERT_EQUAL(r, 0);
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CU_ASSERT_NOT_EQUAL(res.virtual_mc_base_address, 0);
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CU_ASSERT_NOT_EQUAL(res.buf_handle, NULL);
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*vmc_addr = res.virtual_mc_base_address;
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return res.buf_handle;
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}
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#endif /* #ifdef _AMDGPU_TEST_H_ */
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@ -0,0 +1,669 @@
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
|
||||
*
|
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* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
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#include <stdio.h>
|
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#include <stdlib.h>
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#include <unistd.h>
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#include "CUnit/Basic.h"
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#include "amdgpu_test.h"
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#include "amdgpu_drm.h"
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static amdgpu_device_handle device_handle;
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static uint32_t major_version;
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static uint32_t minor_version;
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static void amdgpu_query_info_test(void);
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static void amdgpu_memory_alloc(void);
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static void amdgpu_command_submission_gfx(void);
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static void amdgpu_command_submission_compute(void);
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static void amdgpu_command_submission_sdma(void);
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static void amdgpu_userptr_test(void);
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CU_TestInfo basic_tests[] = {
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{ "Query Info Test", amdgpu_query_info_test },
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{ "Memory alloc Test", amdgpu_memory_alloc },
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{ "Userptr Test", amdgpu_userptr_test },
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{ "Command submission Test (GFX)", amdgpu_command_submission_gfx },
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{ "Command submission Test (Compute)", amdgpu_command_submission_compute },
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{ "Command submission Test (SDMA)", amdgpu_command_submission_sdma },
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CU_TEST_INFO_NULL,
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};
|
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#define BUFFER_SIZE (8 * 1024)
|
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#define SDMA_PKT_HEADER_op_offset 0
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#define SDMA_PKT_HEADER_op_mask 0x000000FF
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#define SDMA_PKT_HEADER_op_shift 0
|
||||
#define SDMA_PKT_HEADER_OP(x) (((x) & SDMA_PKT_HEADER_op_mask) << SDMA_PKT_HEADER_op_shift)
|
||||
#define SDMA_OPCODE_CONSTANT_FILL 11
|
||||
# define SDMA_CONSTANT_FILL_EXTRA_SIZE(x) ((x) << 14)
|
||||
/* 0 = byte fill
|
||||
* 2 = DW fill
|
||||
*/
|
||||
#define SDMA_PACKET(op, sub_op, e) ((((e) & 0xFFFF) << 16) | \
|
||||
(((sub_op) & 0xFF) << 8) | \
|
||||
(((op) & 0xFF) << 0))
|
||||
#define SDMA_OPCODE_WRITE 2
|
||||
# define SDMA_WRITE_SUB_OPCODE_LINEAR 0
|
||||
# define SDMA_WRTIE_SUB_OPCODE_TILED 1
|
||||
|
||||
#define SDMA_OPCODE_COPY 1
|
||||
# define SDMA_COPY_SUB_OPCODE_LINEAR 0
|
||||
|
||||
int suite_basic_tests_init(void)
|
||||
{
|
||||
int r;
|
||||
|
||||
r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
|
||||
&minor_version, &device_handle);
|
||||
|
||||
if (r == 0)
|
||||
return CUE_SUCCESS;
|
||||
else
|
||||
return CUE_SINIT_FAILED;
|
||||
}
|
||||
|
||||
int suite_basic_tests_clean(void)
|
||||
{
|
||||
int r = amdgpu_device_deinitialize(device_handle);
|
||||
|
||||
if (r == 0)
|
||||
return CUE_SUCCESS;
|
||||
else
|
||||
return CUE_SCLEAN_FAILED;
|
||||
}
|
||||
|
||||
static void amdgpu_query_info_test(void)
|
||||
{
|
||||
struct amdgpu_gpu_info gpu_info = {0};
|
||||
uint32_t version, feature;
|
||||
int r;
|
||||
|
||||
r = amdgpu_query_gpu_info(device_handle, &gpu_info);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_query_firmware_version(device_handle, AMDGPU_INFO_FW_VCE, 0,
|
||||
0, &version, &feature);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_memory_alloc(void)
|
||||
{
|
||||
amdgpu_bo_handle bo;
|
||||
uint64_t bo_mc;
|
||||
int r;
|
||||
|
||||
/* Test visible VRAM */
|
||||
bo = gpu_mem_alloc(device_handle,
|
||||
4096, 4096,
|
||||
AMDGPU_GEM_DOMAIN_VRAM,
|
||||
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
|
||||
&bo_mc);
|
||||
|
||||
r = amdgpu_bo_free(bo);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* Test invisible VRAM */
|
||||
bo = gpu_mem_alloc(device_handle,
|
||||
4096, 4096,
|
||||
AMDGPU_GEM_DOMAIN_VRAM,
|
||||
AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
|
||||
&bo_mc);
|
||||
|
||||
r = amdgpu_bo_free(bo);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* Test GART Cacheable */
|
||||
bo = gpu_mem_alloc(device_handle,
|
||||
4096, 4096,
|
||||
AMDGPU_GEM_DOMAIN_GTT,
|
||||
0,
|
||||
&bo_mc);
|
||||
|
||||
r = amdgpu_bo_free(bo);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* Test GART USWC */
|
||||
bo = gpu_mem_alloc(device_handle,
|
||||
4096, 4096,
|
||||
AMDGPU_GEM_DOMAIN_GTT,
|
||||
AMDGPU_GEM_CREATE_CPU_GTT_WC,
|
||||
&bo_mc);
|
||||
|
||||
r = amdgpu_bo_free(bo);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_command_submission_gfx(void)
|
||||
{
|
||||
amdgpu_context_handle context_handle;
|
||||
struct amdgpu_cs_ib_alloc_result ib_result = {0};
|
||||
struct amdgpu_cs_ib_alloc_result ib_result_ce = {0};
|
||||
struct amdgpu_cs_request ibs_request = {0};
|
||||
struct amdgpu_cs_ib_info ib_info[2];
|
||||
struct amdgpu_cs_query_fence fence_status = {0};
|
||||
uint32_t *ptr;
|
||||
uint32_t expired;
|
||||
int r;
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_cs_alloc_ib(device_handle, context_handle,
|
||||
amdgpu_cs_ib_size_4K, &ib_result);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_cs_alloc_ib(device_handle, context_handle,
|
||||
amdgpu_cs_ib_size_4K, &ib_result_ce);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
memset(ib_info, 0, 2 * sizeof(struct amdgpu_cs_ib_info));
|
||||
|
||||
/* IT_SET_CE_DE_COUNTERS */
|
||||
ptr = ib_result_ce.cpu;
|
||||
ptr[0] = 0xc0008900;
|
||||
ptr[1] = 0;
|
||||
ptr[2] = 0xc0008400;
|
||||
ptr[3] = 1;
|
||||
ib_info[0].ib_handle = ib_result_ce.handle;
|
||||
ib_info[0].size = 4;
|
||||
ib_info[0].flags = AMDGPU_CS_GFX_IB_CE;
|
||||
|
||||
/* IT_WAIT_ON_CE_COUNTER */
|
||||
ptr = ib_result.cpu;
|
||||
ptr[0] = 0xc0008600;
|
||||
ptr[1] = 0x00000001;
|
||||
ib_info[1].ib_handle = ib_result.handle;
|
||||
ib_info[1].size = 2;
|
||||
|
||||
ibs_request.ip_type = AMDGPU_HW_IP_GFX;
|
||||
ibs_request.number_of_ibs = 2;
|
||||
ibs_request.ibs = ib_info;
|
||||
|
||||
r = amdgpu_cs_submit(device_handle, context_handle, 0,
|
||||
&ibs_request, 1, &fence_status.fence);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
fence_status.context = context_handle;
|
||||
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
|
||||
fence_status.ip_type = AMDGPU_HW_IP_GFX;
|
||||
|
||||
r = amdgpu_cs_query_fence_status(device_handle, &fence_status, &expired);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_command_submission_compute(void)
|
||||
{
|
||||
amdgpu_context_handle context_handle;
|
||||
struct amdgpu_cs_ib_alloc_result ib_result;
|
||||
struct amdgpu_cs_request ibs_request;
|
||||
struct amdgpu_cs_ib_info ib_info;
|
||||
struct amdgpu_cs_query_fence fence_status;
|
||||
uint32_t *ptr;
|
||||
uint32_t expired;
|
||||
int i, r, instance;
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
for (instance = 0; instance < 8; instance++) {
|
||||
memset(&ib_result, 0, sizeof(struct amdgpu_cs_ib_alloc_result));
|
||||
r = amdgpu_cs_alloc_ib(device_handle, context_handle,
|
||||
amdgpu_cs_ib_size_4K, &ib_result);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
ptr = ib_result.cpu;
|
||||
for (i = 0; i < 16; ++i)
|
||||
ptr[i] = 0xffff1000;
|
||||
|
||||
memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info));
|
||||
ib_info.ib_handle = ib_result.handle;
|
||||
ib_info.size = 16;
|
||||
|
||||
memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
|
||||
ibs_request.ip_type = AMDGPU_HW_IP_COMPUTE;
|
||||
ibs_request.ring = instance;
|
||||
ibs_request.number_of_ibs = 1;
|
||||
ibs_request.ibs = &ib_info;
|
||||
|
||||
memset(&fence_status, 0, sizeof(struct amdgpu_cs_query_fence));
|
||||
r = amdgpu_cs_submit(device_handle, context_handle, 0,
|
||||
&ibs_request, 1, &fence_status.fence);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
fence_status.context = context_handle;
|
||||
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
|
||||
fence_status.ip_type = AMDGPU_HW_IP_COMPUTE;
|
||||
fence_status.ring = instance;
|
||||
|
||||
r = amdgpu_cs_query_fence_status(device_handle, &fence_status, &expired);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* caller need create/release:
|
||||
* pm4_src, resources, ib_info, and ibs_request
|
||||
* submit command stream described in ibs_request and wait for this IB accomplished
|
||||
*/
|
||||
static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle,
|
||||
int instance, int pm4_dw, uint32_t *pm4_src,
|
||||
int res_cnt, amdgpu_bo_handle *resources,
|
||||
struct amdgpu_cs_ib_info *ib_info,
|
||||
struct amdgpu_cs_request *ibs_request)
|
||||
{
|
||||
int r, i, j;
|
||||
uint32_t expired;
|
||||
uint32_t *ring_ptr;
|
||||
struct amdgpu_cs_ib_alloc_result ib_result = {0};
|
||||
struct amdgpu_cs_query_fence fence_status = {0};
|
||||
|
||||
/* prepare CS */
|
||||
CU_ASSERT_NOT_EQUAL(pm4_src, NULL);
|
||||
CU_ASSERT_NOT_EQUAL(resources, NULL);
|
||||
CU_ASSERT_NOT_EQUAL(ib_info, NULL);
|
||||
CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
|
||||
CU_ASSERT_TRUE(pm4_dw <= 1024);
|
||||
|
||||
/* allocate IB */
|
||||
r = amdgpu_cs_alloc_ib(device_handle, context_handle,
|
||||
amdgpu_cs_ib_size_4K, &ib_result);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* copy PM4 packet to ring from caller */
|
||||
ring_ptr = ib_result.cpu;
|
||||
memcpy(ring_ptr, pm4_src, pm4_dw * sizeof(*pm4_src));
|
||||
|
||||
ib_info->ib_handle = ib_result.handle;
|
||||
ib_info->size = pm4_dw;
|
||||
|
||||
ibs_request->ip_type = AMDGPU_HW_IP_DMA;
|
||||
ibs_request->ring = instance;
|
||||
ibs_request->number_of_ibs = 1;
|
||||
ibs_request->ibs = ib_info;
|
||||
ibs_request->number_of_resources = res_cnt;
|
||||
ibs_request->resources = resources;
|
||||
|
||||
|
||||
CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
|
||||
|
||||
/* submit CS */
|
||||
r = amdgpu_cs_submit(device_handle, context_handle, 0,
|
||||
ibs_request, 1, &fence_status.fence);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
fence_status.ip_type = AMDGPU_HW_IP_DMA;
|
||||
fence_status.ring = ibs_request->ring;
|
||||
fence_status.context = context_handle;
|
||||
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
|
||||
|
||||
/* wait for IB accomplished */
|
||||
r = amdgpu_cs_query_fence_status(device_handle, &fence_status,
|
||||
&expired);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
CU_ASSERT_EQUAL(expired, true);
|
||||
}
|
||||
|
||||
static void amdgpu_command_submission_sdma_write_linear(void)
|
||||
{
|
||||
const int sdma_write_length = 128;
|
||||
const int pm4_dw = 256;
|
||||
amdgpu_context_handle context_handle;
|
||||
amdgpu_bo_handle bo;
|
||||
amdgpu_bo_handle *resources;
|
||||
uint32_t *pm4;
|
||||
struct amdgpu_cs_ib_info *ib_info;
|
||||
struct amdgpu_cs_request *ibs_request;
|
||||
uint64_t bo_mc;
|
||||
volatile uint32_t *bo_cpu;
|
||||
int i, j, r, loop;
|
||||
uint64_t gtt_flags[3] = {0, AMDGPU_GEM_CREATE_CPU_GTT_UC,
|
||||
AMDGPU_GEM_CREATE_CPU_GTT_WC};
|
||||
|
||||
pm4 = calloc(pm4_dw, sizeof(*pm4));
|
||||
CU_ASSERT_NOT_EQUAL(pm4, NULL);
|
||||
|
||||
ib_info = calloc(1, sizeof(*ib_info));
|
||||
CU_ASSERT_NOT_EQUAL(ib_info, NULL);
|
||||
|
||||
ibs_request = calloc(1, sizeof(*ibs_request));
|
||||
CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* prepare resource */
|
||||
resources = calloc(1, sizeof(amdgpu_bo_handle));
|
||||
CU_ASSERT_NOT_EQUAL(resources, NULL);
|
||||
|
||||
loop = 0;
|
||||
while(loop < 3) {
|
||||
/* allocate UC bo for sDMA use */
|
||||
bo = gpu_mem_alloc(device_handle,
|
||||
sdma_write_length * sizeof(uint32_t),
|
||||
4096, AMDGPU_GEM_DOMAIN_GTT,
|
||||
gtt_flags[loop], &bo_mc);
|
||||
|
||||
CU_ASSERT_EQUAL(amdgpu_bo_cpu_map(bo, (void **)&bo_cpu), 0);
|
||||
CU_ASSERT_NOT_EQUAL(bo_cpu, NULL);
|
||||
|
||||
/* clear bo */
|
||||
memset((void*)bo_cpu, 0, sdma_write_length * sizeof(uint32_t));
|
||||
|
||||
|
||||
resources[0] = bo;
|
||||
|
||||
/* fullfill PM4: test DMA write-linear */
|
||||
i = j = 0;
|
||||
pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE,
|
||||
SDMA_WRITE_SUB_OPCODE_LINEAR, 0);
|
||||
pm4[i++] = 0xffffffff & bo_mc;
|
||||
pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32;
|
||||
pm4[i++] = sdma_write_length;
|
||||
while(j++ < sdma_write_length)
|
||||
pm4[i++] = 0xdeadbeaf;
|
||||
|
||||
amdgpu_sdma_test_exec_cs(context_handle, 0,
|
||||
i, pm4,
|
||||
1, resources,
|
||||
ib_info, ibs_request);
|
||||
|
||||
/* verify if SDMA test result meets with expected */
|
||||
i = 0;
|
||||
while(i < sdma_write_length) {
|
||||
CU_ASSERT_EQUAL(bo_cpu[i++], 0xdeadbeaf);
|
||||
}
|
||||
amdgpu_bo_free(bo);
|
||||
loop++;
|
||||
}
|
||||
/* clean resources */
|
||||
free(resources);
|
||||
free(ibs_request);
|
||||
free(ib_info);
|
||||
free(pm4);
|
||||
|
||||
/* end of test */
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_command_submission_sdma_const_fill(void)
|
||||
{
|
||||
const int sdma_write_length = 1024 * 1024;
|
||||
const int pm4_dw = 256;
|
||||
amdgpu_context_handle context_handle;
|
||||
amdgpu_bo_handle bo;
|
||||
amdgpu_bo_handle *resources;
|
||||
uint32_t *pm4;
|
||||
struct amdgpu_cs_ib_info *ib_info;
|
||||
struct amdgpu_cs_request *ibs_request;
|
||||
uint64_t bo_mc;
|
||||
volatile uint32_t *bo_cpu;
|
||||
int i, j, r, loop;
|
||||
uint64_t gtt_flags[3] = {0, AMDGPU_GEM_CREATE_CPU_GTT_UC,
|
||||
AMDGPU_GEM_CREATE_CPU_GTT_WC};
|
||||
|
||||
pm4 = calloc(pm4_dw, sizeof(*pm4));
|
||||
CU_ASSERT_NOT_EQUAL(pm4, NULL);
|
||||
|
||||
ib_info = calloc(1, sizeof(*ib_info));
|
||||
CU_ASSERT_NOT_EQUAL(ib_info, NULL);
|
||||
|
||||
ibs_request = calloc(1, sizeof(*ibs_request));
|
||||
CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* prepare resource */
|
||||
resources = calloc(1, sizeof(amdgpu_bo_handle));
|
||||
CU_ASSERT_NOT_EQUAL(resources, NULL);
|
||||
|
||||
loop = 0;
|
||||
while(loop < 3) {
|
||||
/* allocate UC bo for sDMA use */
|
||||
bo = gpu_mem_alloc(device_handle,
|
||||
sdma_write_length, 4096,
|
||||
AMDGPU_GEM_DOMAIN_GTT,
|
||||
gtt_flags[loop], &bo_mc);
|
||||
|
||||
CU_ASSERT_EQUAL(amdgpu_bo_cpu_map(bo, (void **)&bo_cpu), 0);
|
||||
CU_ASSERT_NOT_EQUAL(bo_cpu, NULL);
|
||||
|
||||
/* clear bo */
|
||||
memset((void*)bo_cpu, 0, sdma_write_length);
|
||||
|
||||
resources[0] = bo;
|
||||
|
||||
/* fullfill PM4: test DMA const fill */
|
||||
i = j = 0;
|
||||
pm4[i++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0,
|
||||
SDMA_CONSTANT_FILL_EXTRA_SIZE(2));
|
||||
pm4[i++] = 0xffffffff & bo_mc;
|
||||
pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32;
|
||||
pm4[i++] = 0xdeadbeaf;
|
||||
pm4[i++] = sdma_write_length;
|
||||
|
||||
amdgpu_sdma_test_exec_cs(context_handle, 0,
|
||||
i, pm4,
|
||||
1, resources,
|
||||
ib_info, ibs_request);
|
||||
|
||||
/* verify if SDMA test result meets with expected */
|
||||
i = 0;
|
||||
while(i < (sdma_write_length / 4)) {
|
||||
CU_ASSERT_EQUAL(bo_cpu[i++], 0xdeadbeaf);
|
||||
}
|
||||
amdgpu_bo_free(bo);
|
||||
loop++;
|
||||
}
|
||||
/* clean resources */
|
||||
free(resources);
|
||||
free(ibs_request);
|
||||
free(ib_info);
|
||||
free(pm4);
|
||||
|
||||
/* end of test */
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_command_submission_sdma_copy_linear(void)
|
||||
{
|
||||
const int sdma_write_length = 1024;
|
||||
const int pm4_dw = 256;
|
||||
amdgpu_context_handle context_handle;
|
||||
amdgpu_bo_handle bo1, bo2;
|
||||
amdgpu_bo_handle *resources;
|
||||
uint32_t *pm4;
|
||||
struct amdgpu_cs_ib_info *ib_info;
|
||||
struct amdgpu_cs_request *ibs_request;
|
||||
uint64_t bo1_mc, bo2_mc;
|
||||
volatile unsigned char *bo1_cpu, *bo2_cpu;
|
||||
int i, j, r, loop1, loop2;
|
||||
uint64_t gtt_flags[3] = {0, AMDGPU_GEM_CREATE_CPU_GTT_UC,
|
||||
AMDGPU_GEM_CREATE_CPU_GTT_WC};
|
||||
|
||||
pm4 = calloc(pm4_dw, sizeof(*pm4));
|
||||
CU_ASSERT_NOT_EQUAL(pm4, NULL);
|
||||
|
||||
ib_info = calloc(1, sizeof(*ib_info));
|
||||
CU_ASSERT_NOT_EQUAL(ib_info, NULL);
|
||||
|
||||
ibs_request = calloc(1, sizeof(*ibs_request));
|
||||
CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* prepare resource */
|
||||
resources = calloc(2, sizeof(amdgpu_bo_handle));
|
||||
CU_ASSERT_NOT_EQUAL(resources, NULL);
|
||||
|
||||
loop1 = loop2 = 0;
|
||||
/* run 9 circle to test all mapping combination */
|
||||
while(loop1 < 3) {
|
||||
while(loop2 < 3) {
|
||||
/* allocate UC bo1for sDMA use */
|
||||
bo1 = gpu_mem_alloc(device_handle,
|
||||
sdma_write_length, 4096,
|
||||
AMDGPU_GEM_DOMAIN_GTT,
|
||||
gtt_flags[loop1], &bo1_mc);
|
||||
|
||||
CU_ASSERT_EQUAL(amdgpu_bo_cpu_map(bo1, (void **)&bo1_cpu), 0);
|
||||
CU_ASSERT_NOT_EQUAL(bo1_cpu, NULL);
|
||||
|
||||
/* set bo1 */
|
||||
memset((void*)bo1_cpu, 0xaa, sdma_write_length);
|
||||
|
||||
/* allocate UC bo2 for sDMA use */
|
||||
bo2 = gpu_mem_alloc(device_handle,
|
||||
sdma_write_length, 4096,
|
||||
AMDGPU_GEM_DOMAIN_GTT,
|
||||
gtt_flags[loop2], &bo2_mc);
|
||||
|
||||
CU_ASSERT_EQUAL(amdgpu_bo_cpu_map(bo2, (void **)&bo2_cpu), 0);
|
||||
CU_ASSERT_NOT_EQUAL(bo2_cpu, NULL);
|
||||
|
||||
/* clear bo2 */
|
||||
memset((void*)bo2_cpu, 0, sdma_write_length);
|
||||
|
||||
resources[0] = bo1;
|
||||
resources[1] = bo2;
|
||||
|
||||
/* fullfill PM4: test DMA copy linear */
|
||||
i = j = 0;
|
||||
pm4[i++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0);
|
||||
pm4[i++] = sdma_write_length;
|
||||
pm4[i++] = 0;
|
||||
pm4[i++] = 0xffffffff & bo1_mc;
|
||||
pm4[i++] = (0xffffffff00000000 & bo1_mc) >> 32;
|
||||
pm4[i++] = 0xffffffff & bo2_mc;
|
||||
pm4[i++] = (0xffffffff00000000 & bo2_mc) >> 32;
|
||||
|
||||
|
||||
amdgpu_sdma_test_exec_cs(context_handle, 0,
|
||||
i, pm4,
|
||||
2, resources,
|
||||
ib_info, ibs_request);
|
||||
|
||||
/* verify if SDMA test result meets with expected */
|
||||
i = 0;
|
||||
while(i < sdma_write_length) {
|
||||
CU_ASSERT_EQUAL(bo2_cpu[i++], 0xaa);
|
||||
}
|
||||
amdgpu_bo_free(bo1);
|
||||
amdgpu_bo_free(bo2);
|
||||
loop2++;
|
||||
}
|
||||
loop1++;
|
||||
}
|
||||
/* clean resources */
|
||||
free(resources);
|
||||
free(ibs_request);
|
||||
free(ib_info);
|
||||
free(pm4);
|
||||
|
||||
/* end of test */
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_command_submission_sdma(void)
|
||||
{
|
||||
amdgpu_command_submission_sdma_write_linear();
|
||||
amdgpu_command_submission_sdma_const_fill();
|
||||
amdgpu_command_submission_sdma_copy_linear();
|
||||
}
|
||||
|
||||
static void amdgpu_userptr_test(void)
|
||||
{
|
||||
int i, r, j;
|
||||
uint32_t *pm4 = NULL;
|
||||
uint64_t bo_mc;
|
||||
void *ptr = NULL;
|
||||
int pm4_dw = 256;
|
||||
int sdma_write_length = 4;
|
||||
amdgpu_bo_handle handle;
|
||||
amdgpu_context_handle context_handle;
|
||||
struct amdgpu_cs_ib_info *ib_info;
|
||||
struct amdgpu_cs_request *ibs_request;
|
||||
struct amdgpu_bo_alloc_result res;
|
||||
|
||||
memset(&res, 0, sizeof(res));
|
||||
|
||||
pm4 = calloc(pm4_dw, sizeof(*pm4));
|
||||
CU_ASSERT_NOT_EQUAL(pm4, NULL);
|
||||
|
||||
ib_info = calloc(1, sizeof(*ib_info));
|
||||
CU_ASSERT_NOT_EQUAL(ib_info, NULL);
|
||||
|
||||
ibs_request = calloc(1, sizeof(*ibs_request));
|
||||
CU_ASSERT_NOT_EQUAL(ibs_request, NULL);
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
posix_memalign(&ptr, sysconf(_SC_PAGE_SIZE), BUFFER_SIZE);
|
||||
CU_ASSERT_NOT_EQUAL(ptr, NULL);
|
||||
memset(ptr, 0, BUFFER_SIZE);
|
||||
|
||||
r = amdgpu_create_bo_from_user_mem(device_handle,
|
||||
ptr, BUFFER_SIZE, &res);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
bo_mc = res.virtual_mc_base_address;
|
||||
handle = res.buf_handle;
|
||||
|
||||
j = i = 0;
|
||||
pm4[i++] = SDMA_PACKET(SDMA_OPCODE_WRITE,
|
||||
SDMA_WRITE_SUB_OPCODE_LINEAR, 0);
|
||||
pm4[i++] = 0xffffffff & bo_mc;
|
||||
pm4[i++] = (0xffffffff00000000 & bo_mc) >> 32;
|
||||
pm4[i++] = sdma_write_length;
|
||||
|
||||
while (j++ < sdma_write_length)
|
||||
pm4[i++] = 0xdeadbeaf;
|
||||
|
||||
amdgpu_sdma_test_exec_cs(context_handle, 0,
|
||||
i, pm4,
|
||||
1, &handle,
|
||||
ib_info, ibs_request);
|
||||
i = 0;
|
||||
while (i < sdma_write_length) {
|
||||
CU_ASSERT_EQUAL(((int*)ptr)[i++], 0xdeadbeaf);
|
||||
}
|
||||
free(ibs_request);
|
||||
free(ib_info);
|
||||
free(pm4);
|
||||
r = amdgpu_bo_free(res.buf_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
free(ptr);
|
||||
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
|
@ -0,0 +1,151 @@
|
|||
/*
|
||||
* Copyright 2014 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "CUnit/Basic.h"
|
||||
|
||||
#include "amdgpu_test.h"
|
||||
#include "amdgpu_drm.h"
|
||||
|
||||
#define BUFFER_SIZE (4*1024)
|
||||
#define BUFFER_ALIGN (4*1024)
|
||||
|
||||
static amdgpu_device_handle device_handle;
|
||||
static uint32_t major_version;
|
||||
static uint32_t minor_version;
|
||||
|
||||
static amdgpu_bo_handle buffer_handle;
|
||||
static uint64_t virtual_mc_base_address;
|
||||
|
||||
static void amdgpu_bo_export_import(void);
|
||||
static void amdgpu_bo_metadata(void);
|
||||
static void amdgpu_bo_map_unmap(void);
|
||||
|
||||
CU_TestInfo bo_tests[] = {
|
||||
{ "Export/Import", amdgpu_bo_export_import },
|
||||
#if 0
|
||||
{ "Metadata", amdgpu_bo_metadata },
|
||||
#endif
|
||||
{ "CPU map/unmap", amdgpu_bo_map_unmap },
|
||||
CU_TEST_INFO_NULL,
|
||||
};
|
||||
|
||||
int suite_bo_tests_init(void)
|
||||
{
|
||||
struct amdgpu_bo_alloc_request req = {0};
|
||||
struct amdgpu_bo_alloc_result res = {0};
|
||||
int r;
|
||||
|
||||
r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
|
||||
&minor_version, &device_handle);
|
||||
if (r)
|
||||
return CUE_SINIT_FAILED;
|
||||
|
||||
req.alloc_size = BUFFER_SIZE;
|
||||
req.phys_alignment = BUFFER_ALIGN;
|
||||
req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
|
||||
|
||||
r = amdgpu_bo_alloc(device_handle, &req, &res);
|
||||
if (r)
|
||||
return CUE_SINIT_FAILED;
|
||||
|
||||
buffer_handle = res.buf_handle;
|
||||
virtual_mc_base_address = res.virtual_mc_base_address;
|
||||
|
||||
return CUE_SUCCESS;
|
||||
}
|
||||
|
||||
int suite_bo_tests_clean(void)
|
||||
{
|
||||
int r;
|
||||
|
||||
r = amdgpu_bo_free(buffer_handle);
|
||||
if (r)
|
||||
return CUE_SCLEAN_FAILED;
|
||||
|
||||
r = amdgpu_device_deinitialize(device_handle);
|
||||
if (r)
|
||||
return CUE_SCLEAN_FAILED;
|
||||
|
||||
return CUE_SUCCESS;
|
||||
}
|
||||
|
||||
static void amdgpu_bo_export_import_do_type(enum amdgpu_bo_handle_type type)
|
||||
{
|
||||
struct amdgpu_bo_import_result res = {0};
|
||||
uint32_t shared_handle;
|
||||
int r;
|
||||
|
||||
r = amdgpu_bo_export(buffer_handle, type, &shared_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_import(device_handle, type, shared_handle, &res);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
CU_ASSERT_EQUAL(res.buf_handle, buffer_handle);
|
||||
CU_ASSERT_EQUAL(res.alloc_size, BUFFER_SIZE);
|
||||
|
||||
r = amdgpu_bo_free(res.buf_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_bo_export_import(void)
|
||||
{
|
||||
amdgpu_bo_export_import_do_type(amdgpu_bo_handle_type_gem_flink_name);
|
||||
amdgpu_bo_export_import_do_type(amdgpu_bo_handle_type_dma_buf_fd);
|
||||
}
|
||||
|
||||
static void amdgpu_bo_metadata(void)
|
||||
{
|
||||
struct amdgpu_bo_metadata meta = {0};
|
||||
struct amdgpu_bo_info info = {0};
|
||||
int r;
|
||||
|
||||
meta.size_metadata = 1;
|
||||
meta.umd_metadata[0] = 0xdeadbeef;
|
||||
|
||||
r = amdgpu_bo_set_metadata(buffer_handle, &meta);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_query_info(buffer_handle, &info);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
CU_ASSERT_EQUAL(info.metadata.size_metadata, 1);
|
||||
CU_ASSERT_EQUAL(info.metadata.umd_metadata[0], 0xdeadbeef);
|
||||
}
|
||||
|
||||
static void amdgpu_bo_map_unmap(void)
|
||||
{
|
||||
uint32_t *ptr;
|
||||
int i, r;
|
||||
|
||||
r = amdgpu_bo_cpu_map(buffer_handle, (void **)&ptr);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
CU_ASSERT_NOT_EQUAL(ptr, NULL);
|
||||
|
||||
for (i = 0; i < (BUFFER_SIZE / 4); ++i)
|
||||
ptr[i] = 0xdeadbeef;
|
||||
|
||||
r = amdgpu_bo_cpu_unmap(buffer_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
|
@ -0,0 +1,319 @@
|
|||
/*
|
||||
* Copyright 2014 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
#include "CUnit/Basic.h"
|
||||
|
||||
#include "util_math.h"
|
||||
|
||||
#include "amdgpu_test.h"
|
||||
#include "uvd_messages.h"
|
||||
#include "amdgpu_drm.h"
|
||||
#include "amdgpu_internal.h"
|
||||
|
||||
#define IB_SIZE amdgpu_cs_ib_size_4K
|
||||
#define MAX_RESOURCES 16
|
||||
|
||||
static amdgpu_device_handle device_handle;
|
||||
static uint32_t major_version;
|
||||
static uint32_t minor_version;
|
||||
static uint32_t family_id;
|
||||
|
||||
static amdgpu_context_handle context_handle;
|
||||
static amdgpu_ib_handle ib_handle;
|
||||
uint32_t *ib_cpu;
|
||||
|
||||
static amdgpu_bo_handle resources[MAX_RESOURCES];
|
||||
static unsigned num_resources;
|
||||
|
||||
static void amdgpu_cs_uvd_create(void);
|
||||
static void amdgpu_cs_uvd_decode(void);
|
||||
static void amdgpu_cs_uvd_destroy(void);
|
||||
|
||||
CU_TestInfo cs_tests[] = {
|
||||
{ "UVD create", amdgpu_cs_uvd_create },
|
||||
{ "UVD decode", amdgpu_cs_uvd_decode },
|
||||
{ "UVD destroy", amdgpu_cs_uvd_destroy },
|
||||
CU_TEST_INFO_NULL,
|
||||
};
|
||||
|
||||
int suite_cs_tests_init(void)
|
||||
{
|
||||
struct amdgpu_cs_ib_alloc_result ib_result = {0};
|
||||
int r;
|
||||
|
||||
r = amdgpu_device_initialize(drm_amdgpu[0], &major_version,
|
||||
&minor_version, &device_handle);
|
||||
if (r)
|
||||
return CUE_SINIT_FAILED;
|
||||
|
||||
family_id = device_handle->info.family_id;
|
||||
|
||||
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
|
||||
if (r)
|
||||
return CUE_SINIT_FAILED;
|
||||
|
||||
r = amdgpu_cs_alloc_ib(device_handle, context_handle,
|
||||
IB_SIZE, &ib_result);
|
||||
if (r)
|
||||
return CUE_SINIT_FAILED;
|
||||
|
||||
ib_handle = ib_result.handle;
|
||||
ib_cpu = ib_result.cpu;
|
||||
|
||||
return CUE_SUCCESS;
|
||||
}
|
||||
|
||||
int suite_cs_tests_clean(void)
|
||||
{
|
||||
int r;
|
||||
|
||||
r = amdgpu_cs_free_ib(device_handle, context_handle, ib_handle);
|
||||
if (r)
|
||||
return CUE_SCLEAN_FAILED;
|
||||
|
||||
r = amdgpu_cs_ctx_free(device_handle, context_handle);
|
||||
if (r)
|
||||
return CUE_SCLEAN_FAILED;
|
||||
|
||||
r = amdgpu_device_deinitialize(device_handle);
|
||||
if (r)
|
||||
return CUE_SCLEAN_FAILED;
|
||||
|
||||
return CUE_SUCCESS;
|
||||
}
|
||||
|
||||
static int submit(unsigned ndw, unsigned ip)
|
||||
{
|
||||
struct amdgpu_cs_ib_alloc_result ib_result = {0};
|
||||
struct amdgpu_cs_request ibs_request = {0};
|
||||
struct amdgpu_cs_ib_info ib_info = {0};
|
||||
struct amdgpu_cs_query_fence fence_status = {0};
|
||||
uint32_t expired;
|
||||
int r;
|
||||
|
||||
ib_info.ib_handle = ib_handle;
|
||||
ib_info.size = ndw;
|
||||
|
||||
ibs_request.ip_type = ip;
|
||||
ibs_request.number_of_resources = num_resources;
|
||||
ibs_request.resources = resources;
|
||||
ibs_request.number_of_ibs = 1;
|
||||
ibs_request.ibs = &ib_info;
|
||||
|
||||
r = amdgpu_cs_submit(device_handle, context_handle, 0,
|
||||
&ibs_request, 1, &fence_status.fence);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
r = amdgpu_cs_alloc_ib(device_handle, context_handle,
|
||||
IB_SIZE, &ib_result);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
ib_handle = ib_result.handle;
|
||||
ib_cpu = ib_result.cpu;
|
||||
|
||||
fence_status.context = context_handle;
|
||||
fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE;
|
||||
fence_status.ip_type = ip;
|
||||
|
||||
r = amdgpu_cs_query_fence_status(device_handle, &fence_status, &expired);
|
||||
if (r)
|
||||
return r;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void uvd_cmd(uint64_t addr, unsigned cmd, int *idx)
|
||||
{
|
||||
ib_cpu[(*idx)++] = 0x3BC4;
|
||||
ib_cpu[(*idx)++] = addr;
|
||||
ib_cpu[(*idx)++] = 0x3BC5;
|
||||
ib_cpu[(*idx)++] = addr >> 32;
|
||||
ib_cpu[(*idx)++] = 0x3BC3;
|
||||
ib_cpu[(*idx)++] = cmd << 1;
|
||||
}
|
||||
|
||||
static void amdgpu_cs_uvd_create(void)
|
||||
{
|
||||
struct amdgpu_bo_alloc_request req = {0};
|
||||
struct amdgpu_bo_alloc_result res = {0};
|
||||
void *msg;
|
||||
int i, r;
|
||||
|
||||
req.alloc_size = 4*1024;
|
||||
req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
|
||||
|
||||
r = amdgpu_bo_alloc(device_handle, &req, &res);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_cpu_map(res.buf_handle, &msg);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
memcpy(msg, uvd_create_msg, sizeof(uvd_create_msg));
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
((uint8_t*)msg)[0x10] = 7;
|
||||
|
||||
r = amdgpu_bo_cpu_unmap(res.buf_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
num_resources = 0;
|
||||
resources[num_resources++] = res.buf_handle;
|
||||
|
||||
i = 0;
|
||||
uvd_cmd(res.virtual_mc_base_address, 0x0, &i);
|
||||
for (; i % 16; ++i)
|
||||
ib_cpu[i] = 0x80000000;
|
||||
|
||||
r = submit(i, AMDGPU_HW_IP_UVD);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_free(resources[0]);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_cs_uvd_decode(void)
|
||||
{
|
||||
const unsigned dpb_size = 15923584, dt_size = 737280;
|
||||
uint64_t msg_addr, fb_addr, bs_addr, dpb_addr, dt_addr, it_addr;
|
||||
struct amdgpu_bo_alloc_request req = {0};
|
||||
struct amdgpu_bo_alloc_result res = {0};
|
||||
uint64_t sum;
|
||||
uint8_t *ptr;
|
||||
int i, r;
|
||||
|
||||
req.alloc_size = 4*1024; /* msg */
|
||||
req.alloc_size += 4*1024; /* fb */
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
req.alloc_size += 4096; /*it_scaling_table*/
|
||||
req.alloc_size += ALIGN(sizeof(uvd_bitstream), 4*1024);
|
||||
req.alloc_size += ALIGN(dpb_size, 4*1024);
|
||||
req.alloc_size += ALIGN(dt_size, 4*1024);
|
||||
|
||||
req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
|
||||
|
||||
r = amdgpu_bo_alloc(device_handle, &req, &res);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_cpu_map(res.buf_handle, (void **)&ptr);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
memcpy(ptr, uvd_decode_msg, sizeof(uvd_create_msg));
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
ptr[0x10] = 7;
|
||||
|
||||
ptr += 4*1024;
|
||||
memset(ptr, 0, 4*1024);
|
||||
if (family_id >= AMDGPU_FAMILY_VI) {
|
||||
ptr += 4*1024;
|
||||
memcpy(ptr, uvd_it_scaling_table, sizeof(uvd_it_scaling_table));
|
||||
}
|
||||
|
||||
ptr += 4*1024;
|
||||
memcpy(ptr, uvd_bitstream, sizeof(uvd_bitstream));
|
||||
|
||||
ptr += ALIGN(sizeof(uvd_bitstream), 4*1024);
|
||||
memset(ptr, 0, dpb_size);
|
||||
|
||||
ptr += ALIGN(dpb_size, 4*1024);
|
||||
memset(ptr, 0, dt_size);
|
||||
|
||||
num_resources = 0;
|
||||
resources[num_resources++] = res.buf_handle;
|
||||
|
||||
msg_addr = res.virtual_mc_base_address;
|
||||
fb_addr = msg_addr + 4*1024;
|
||||
if (family_id >= AMDGPU_FAMILY_VI) {
|
||||
it_addr = fb_addr + 4*1024;
|
||||
bs_addr = it_addr + 4*1024;
|
||||
} else
|
||||
bs_addr = fb_addr + 4*1024;
|
||||
dpb_addr = ALIGN(bs_addr + sizeof(uvd_bitstream), 4*1024);
|
||||
dt_addr = ALIGN(dpb_addr + dpb_size, 4*1024);
|
||||
|
||||
i = 0;
|
||||
uvd_cmd(msg_addr, 0x0, &i);
|
||||
uvd_cmd(dpb_addr, 0x1, &i);
|
||||
uvd_cmd(dt_addr, 0x2, &i);
|
||||
uvd_cmd(fb_addr, 0x3, &i);
|
||||
uvd_cmd(bs_addr, 0x100, &i);
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
uvd_cmd(it_addr, 0x204, &i);
|
||||
ib_cpu[i++] = 0x3BC6;
|
||||
ib_cpu[i++] = 0x1;
|
||||
for (; i % 16; ++i)
|
||||
ib_cpu[i] = 0x80000000;
|
||||
|
||||
r = submit(i, AMDGPU_HW_IP_UVD);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
/* TODO: use a real CRC32 */
|
||||
for (i = 0, sum = 0; i < dt_size; ++i)
|
||||
sum += ptr[i];
|
||||
CU_ASSERT_EQUAL(sum, 0x20345d8);
|
||||
|
||||
r = amdgpu_bo_cpu_unmap(res.buf_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_free(resources[0]);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
||||
static void amdgpu_cs_uvd_destroy(void)
|
||||
{
|
||||
struct amdgpu_bo_alloc_request req = {0};
|
||||
struct amdgpu_bo_alloc_result res = {0};
|
||||
void *msg;
|
||||
int i, r;
|
||||
|
||||
req.alloc_size = 4*1024;
|
||||
req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
|
||||
|
||||
r = amdgpu_bo_alloc(device_handle, &req, &res);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_cpu_map(res.buf_handle, &msg);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
memcpy(msg, uvd_destroy_msg, sizeof(uvd_create_msg));
|
||||
if (family_id >= AMDGPU_FAMILY_VI)
|
||||
((uint8_t*)msg)[0x10] = 7;
|
||||
|
||||
r = amdgpu_bo_cpu_unmap(res.buf_handle);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
num_resources = 0;
|
||||
resources[num_resources++] = res.buf_handle;
|
||||
|
||||
i = 0;
|
||||
uvd_cmd(res.virtual_mc_base_address, 0x0, &i);
|
||||
for (; i % 16; ++i)
|
||||
ib_cpu[i] = 0x80000000;
|
||||
|
||||
r = submit(i, AMDGPU_HW_IP_UVD);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
r = amdgpu_bo_free(resources[0]);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
}
|
||||
|
|
@ -0,0 +1,813 @@
|
|||
/*
|
||||
* Copyright 2014 Advanced Micro Devices, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _UVD_MESSAGES_H_
|
||||
#define _UVD_MESSAGES_H_
|
||||
|
||||
static uint8_t uvd_create_msg[] = {
|
||||
0xe4,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x03,0x00,0x00,
|
||||
0xe0,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xf9,0xf2,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
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||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_bitstream[] ={
|
||||
0x00,0x00,0x01,0x25,0xb8,0x20,0x20,0x21,0x44,0xc5,0x00,0x01,0x57,0x9b,0xef,0xbe,
|
||||
0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,
|
||||
0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,
|
||||
0xbe,0xfb,0xef,0xbe,0xff,0x87,0xff,0xc2,0x58,0x0e,0x00,0x02,0x02,0xa0,0x00,0x20,
|
||||
0x3a,0x00,0x0d,0x00,0x01,0x01,0xa4,0xcb,0x94,0x73,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xaf,0x00,0x00,0x01,0x25,0x00,0xa2,0xb8,0x20,0x20,0x21,0x44,
|
||||
0xc5,0x00,0x01,0x57,0x9b,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,
|
||||
0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,
|
||||
0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xff,0x87,0xff,0xc2,0x58,
|
||||
0x0e,0x00,0x02,0x02,0xa0,0x00,0x20,0x3a,0x00,0x0d,0x00,0x01,0x01,0xa4,0xcb,0x94,
|
||||
0x73,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xaf,0x00,0x00,0x01,0x25,
|
||||
0x00,0x51,0x2e,0x08,0x08,0x08,0x51,0x31,0x40,0x00,0x55,0xe6,0xfb,0xef,0xbe,0xfb,
|
||||
0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,
|
||||
0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,
|
||||
0xfb,0xef,0xbf,0xe1,0xff,0xf0,0x96,0x03,0x80,0x00,0x80,0xa8,0x00,0x08,0x0e,0x80,
|
||||
0x03,0x40,0x00,0x40,0x69,0x32,0xe5,0x1c,0xfa,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xc0,0x00,0x00,0x01,0x25,0x00,0x79,0xae,0x08,0x08,0x08,0x51,0x31,
|
||||
0x40,0x00,0x55,0xe6,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,
|
||||
0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,
|
||||
0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbf,0xe1,0xff,0xf0,0x96,0x03,
|
||||
0x80,0x00,0x80,0xa8,0x00,0x08,0x0e,0x80,0x03,0x40,0x00,0x40,0x69,0x32,0xe5,0x1c,
|
||||
0xfa,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xc0,0x00,0x00,0x01,0x25,
|
||||
0x00,0x28,0x8b,0x82,0x02,0x02,0x14,0x4c,0x50,0x00,0x15,0x79,0xbe,0xfb,0xef,0xbe,
|
||||
0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,
|
||||
0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,0xbe,0xfb,0xef,
|
||||
0xbe,0xfb,0xef,0xf8,0x7f,0xfc,0x25,0x80,0xe0,0x00,0x20,0x2a,0x00,0x02,0x03,0xa0,
|
||||
0x00,0xd0,0x00,0x10,0x1a,0x4c,0xb9,0x47,0x3e,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,
|
||||
0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,
|
||||
0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,0xeb,0xae,0xba,
|
||||
0xeb,0xae,0xba,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_decode_msg[] = {
|
||||
0xe4,0x0d,0x00,0x00,0x01,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x01,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,0x60,0x03,0x00,0x00,0xe0,0x01,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x80,0xf9,0xf2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x05,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0xc0,0x03,0x00,0x00,0x80,0x07,0x00,0x00,0x60,0x09,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x02,0x00,0x00,0x00,0x1e,0x00,0x00,0x00,0x05,0x00,0x00,0x00,0x88,0x00,0x00,0x00,
|
||||
0x01,0x00,0x00,0x01,0x00,0x03,0x02,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_destroy_msg[] = {
|
||||
0xe4,0x0d,0x00,0x00,0x02,0x00,0x00,0x00,0x03,0x00,0x44,0x40,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
|
||||
};
|
||||
|
||||
static uint8_t uvd_it_scaling_table[] = {
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,
|
||||
};
|
||||
|
||||
#endif /* _UVD_MESSAGES_H_ */
|
||||
|
|
@ -62,6 +62,7 @@ static const char *drivers[] = {
|
|||
"nouveau",
|
||||
"vmwgfx",
|
||||
"exynos",
|
||||
"amdgpu",
|
||||
"imx-drm",
|
||||
"rockchip",
|
||||
"atmel-hlcdc",
|
||||
|
|
|
|||
Loading…
Reference in New Issue