nouveau: 0.0.14 + extend bo interface to support subrange mapping
Normal map() should operate as before, and map_range()/map_flush() should give correct results but lacking any performance difference from map(). Nothing exiting being done here yet, but the interface is a good start.main
parent
2cb4c64d73
commit
3d4bfe8c89
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@ -5,6 +5,6 @@ includedir=@includedir@
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Name: libdrm_nouveau
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Description: Userspace interface to nouveau kernel DRM services
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Version: 0.5
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Version: 0.6
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Libs: -L${libdir} -ldrm_nouveau
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Cflags: -I${includedir} -I${includedir}/drm -I${includedir}/nouveau
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@ -52,15 +52,8 @@ nouveau_bo_info(struct nouveau_bo_priv *nvbo, struct drm_nouveau_gem_info *arg)
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nvbo->size = nvbo->base.size = arg->size;
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nvbo->offset = arg->offset;
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nvbo->map_handle = arg->map_handle;
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if (nvbo->domain & NOUVEAU_GEM_DOMAIN_TILE) {
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nvbo->base.tiled = 1;
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if (nvbo->domain & NOUVEAU_GEM_DOMAIN_TILE_ZETA)
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nvbo->base.tiled |= 2;
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} else {
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nvbo->base.tiled = 0;
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}
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nvbo->base.tile_mode = arg->tile_mode;
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nvbo->base.tile_flags = arg->tile_flags;
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return 0;
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}
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@ -218,15 +211,12 @@ nouveau_bo_kalloc(struct nouveau_bo_priv *nvbo, struct nouveau_channel *chan)
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NOUVEAU_GEM_DOMAIN_GART);
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}
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if (nvbo->flags & NOUVEAU_BO_TILED) {
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info->domain |= NOUVEAU_GEM_DOMAIN_TILE;
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if (nvbo->flags & NOUVEAU_BO_ZTILE)
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info->domain |= NOUVEAU_GEM_DOMAIN_TILE_ZETA;
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}
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if (nvbo->flags & NOUVEAU_BO_MAP)
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info->domain |= NOUVEAU_GEM_DOMAIN_MAPPABLE;
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info->tile_mode = nvbo->base.tile_mode;
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info->tile_flags = nvbo->base.tile_flags;
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ret = drmCommandWriteRead(nvdev->fd, DRM_NOUVEAU_GEM_NEW,
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&req, sizeof(req));
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if (ret)
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@ -276,8 +266,9 @@ nouveau_bo_kmap(struct nouveau_bo_priv *nvbo)
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}
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int
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nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
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int size, struct nouveau_bo **bo)
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nouveau_bo_new_tile(struct nouveau_device *dev, uint32_t flags, int align,
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int size, uint32_t tile_mode, uint32_t tile_flags,
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struct nouveau_bo **bo)
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{
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struct nouveau_bo_priv *nvbo;
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int ret;
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@ -290,6 +281,8 @@ nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
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return -ENOMEM;
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nvbo->base.device = dev;
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nvbo->base.size = size;
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nvbo->base.tile_mode = tile_mode;
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nvbo->base.tile_flags = tile_flags;
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nvbo->refcount = 1;
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/* Don't set NOUVEAU_BO_PIN here, or nouveau_bo_allocated() will
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@ -300,13 +293,6 @@ nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
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nvbo->size = size;
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nvbo->align = align;
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/*XXX: murder me violently */
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if (flags & NOUVEAU_BO_TILED) {
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nvbo->base.tiled = 1;
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if (flags & NOUVEAU_BO_ZTILE)
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nvbo->base.tiled |= 2;
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}
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if (flags & NOUVEAU_BO_PIN) {
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ret = nouveau_bo_pin((void *)nvbo, nvbo->flags);
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if (ret) {
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@ -319,6 +305,22 @@ nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
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return 0;
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}
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int
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nouveau_bo_new(struct nouveau_device *dev, uint32_t flags, int align,
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int size, struct nouveau_bo **bo)
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{
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uint32_t tile_flags = 0;
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if (flags & NOUVEAU_BO_TILED) {
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if (flags & NOUVEAU_BO_ZTILE)
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tile_flags = 0x2800;
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else
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tile_flags = 0x7000;
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}
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return nouveau_bo_new_tile(dev, flags, align, size, 0, tile_flags, bo);
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}
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int
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nouveau_bo_user(struct nouveau_device *dev, void *ptr, int size,
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struct nouveau_bo **bo)
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@ -575,7 +577,8 @@ nouveau_bo_wait(struct nouveau_bo *bo, int cpu_write)
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}
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int
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nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags)
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nouveau_bo_map_range(struct nouveau_bo *bo, uint32_t delta, uint32_t size,
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uint32_t flags)
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{
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struct nouveau_bo_priv *nvbo = nouveau_bo(bo);
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int ret;
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@ -598,22 +601,35 @@ nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags)
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}
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if (nvbo->sysmem) {
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bo->map = nvbo->sysmem;
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bo->map = (char *)nvbo->sysmem + delta;
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} else {
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ret = nouveau_bo_kmap(nvbo);
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if (ret)
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return ret;
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if (!(flags & NOUVEAU_BO_NOSYNC)) {
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ret = nouveau_bo_wait(bo, (flags & NOUVEAU_BO_WR));
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if (ret)
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return ret;
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}
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bo->map = nvbo->map;
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bo->map = (char *)nvbo->map + delta;
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}
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return 0;
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}
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void
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nouveau_bo_map_flush(struct nouveau_bo *bo, uint32_t delta, uint32_t size)
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{
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}
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int
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nouveau_bo_map(struct nouveau_bo *bo, uint32_t flags)
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{
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return nouveau_bo_map_range(bo, 0, bo->size, flags);
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}
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void
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nouveau_bo_unmap(struct nouveau_bo *bo)
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{
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@ -37,6 +37,10 @@
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#define NOUVEAU_BO_LOCAL (1 << 9)
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#define NOUVEAU_BO_TILED (1 << 10)
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#define NOUVEAU_BO_ZTILE (1 << 11)
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#define NOUVEAU_BO_INVAL (1 << 12)
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#define NOUVEAU_BO_NOSYNC (1 << 13)
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#define NOUVEAU_BO_NOWAIT (1 << 14)
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#define NOUVEAU_BO_IFLUSH (1 << 15)
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#define NOUVEAU_BO_DUMMY (1 << 31)
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struct nouveau_bo {
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@ -46,7 +50,8 @@ struct nouveau_bo {
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uint64_t size;
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void *map;
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int tiled;
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uint32_t tile_mode;
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uint32_t tile_flags;
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/* Available when buffer is pinned *only* */
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uint32_t flags;
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@ -57,6 +62,11 @@ int
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nouveau_bo_new(struct nouveau_device *, uint32_t flags, int align, int size,
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struct nouveau_bo **);
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int
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nouveau_bo_new_tile(struct nouveau_device *, uint32_t flags, int align,
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int size, uint32_t tile_mode, uint32_t tile_flags,
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struct nouveau_bo **);
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int
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nouveau_bo_user(struct nouveau_device *, void *ptr, int size,
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struct nouveau_bo **);
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@ -78,6 +88,13 @@ nouveau_bo_handle_ref(struct nouveau_device *, uint32_t handle,
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int
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nouveau_bo_ref(struct nouveau_bo *, struct nouveau_bo **);
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int
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nouveau_bo_map_range(struct nouveau_bo *, uint32_t delta, uint32_t size,
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uint32_t flags);
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void
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nouveau_bo_map_flush(struct nouveau_bo *, uint32_t delta, uint32_t size);
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int
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nouveau_bo_map(struct nouveau_bo *, uint32_t flags);
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@ -26,7 +26,7 @@
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#include "nouveau_private.h"
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#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 13
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#if NOUVEAU_DRM_HEADER_PATCHLEVEL != 14
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#error nouveau_drm.h does not match expected patchlevel, update libdrm.
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#endif
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@ -60,8 +60,8 @@ nouveau_pushbuf_calc_reloc(struct drm_nouveau_gem_pushbuf_bo *pbbo,
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int
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nouveau_pushbuf_emit_reloc(struct nouveau_channel *chan, void *ptr,
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struct nouveau_bo *bo, uint32_t data, uint32_t flags,
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uint32_t vor, uint32_t tor)
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struct nouveau_bo *bo, uint32_t data, uint32_t data2,
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uint32_t flags, uint32_t vor, uint32_t tor)
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{
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struct nouveau_device_priv *nvdev = nouveau_device(chan->device);
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struct nouveau_pushbuf_priv *nvpb = nouveau_pushbuf(chan->pushbuf);
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@ -41,8 +41,8 @@ nouveau_pushbuf_flush(struct nouveau_channel *, unsigned min);
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int
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nouveau_pushbuf_emit_reloc(struct nouveau_channel *, void *ptr,
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struct nouveau_bo *, uint32_t data, uint32_t flags,
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uint32_t vor, uint32_t tor);
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struct nouveau_bo *, uint32_t data, uint32_t data2,
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uint32_t flags, uint32_t vor, uint32_t tor);
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/* Push buffer access macros */
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static __inline__ void
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unsigned data, unsigned flags, unsigned vor, unsigned tor)
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{
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nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo,
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data, flags, vor, tor);
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data, 0, flags, vor, tor);
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}
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static __inline__ void
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OUT_RELOC2(struct nouveau_channel *chan, struct nouveau_bo *bo,
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unsigned data, unsigned data2, unsigned flags,
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unsigned vor, unsigned tor)
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{
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nouveau_pushbuf_emit_reloc(chan, chan->pushbuf->cur++, bo,
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data, data2, flags, vor, tor);
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}
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/* Raw data + flags depending on FB/TT buffer */
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OUT_RELOC(chan, bo, delta, flags | NOUVEAU_BO_LOW, 0, 0);
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}
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/* Low 32-bits of offset + GPU linear access range info */
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static __inline__ void
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OUT_RELOCr(struct nouveau_channel *chan, struct nouveau_bo *bo,
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unsigned delta, unsigned size, unsigned flags)
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{
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OUT_RELOC2(chan, bo, delta, size, flags | NOUVEAU_BO_LOW, 0, 0);
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}
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/* High 32-bits of offset */
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static __inline__ void
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OUT_RELOCh(struct nouveau_channel *chan, struct nouveau_bo *bo,
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@ -25,7 +25,7 @@
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#ifndef __NOUVEAU_DRM_H__
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#define __NOUVEAU_DRM_H__
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#define NOUVEAU_DRM_HEADER_PATCHLEVEL 13
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#define NOUVEAU_DRM_HEADER_PATCHLEVEL 14
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struct drm_nouveau_channel_alloc {
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uint32_t fb_ctxdma_handle;
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#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1)
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#define NOUVEAU_GEM_DOMAIN_GART (1 << 2)
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#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3)
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#define NOUVEAU_GEM_DOMAIN_TILE (1 << 30)
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#define NOUVEAU_GEM_DOMAIN_TILE_ZETA (1 << 31)
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struct drm_nouveau_gem_info {
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uint32_t handle;
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uint64_t size;
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uint64_t offset;
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uint64_t map_handle;
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uint32_t tile_mode;
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uint32_t tile_flags;
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};
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struct drm_nouveau_gem_new {
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@ -34,7 +34,7 @@
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 13
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#define DRIVER_PATCHLEVEL 14
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#define NOUVEAU_FAMILY 0x0000FFFF
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#define NOUVEAU_FLAGS 0xFFFF0000
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