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set the base address of the CRTC correctly

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David Airlie 2007-04-10 15:20:50 +10:00
parent 65f465ed5a
commit 40bd6dcd86
3 changed files with 6 additions and 2 deletions
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3
linux-core/intel_display.c
View File

@ -351,9 +351,10 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y)
int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);
int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
Start = crtc->fb->offset;
Start = crtc->fb->offset + dev_priv->baseaddr;
Offset = ((y * crtc->fb->width + x) * (crtc->fb->bits_per_pixel / 8));
DRM_DEBUG("Writing base %08X %08X %d %d\n", Start, Offset, x, y);
if (IS_I965G(dev)) {
I915_WRITE(dspbase, Offset);
I915_READ(dspbase);

4
shared-core/i915_dma.c
View File

@ -877,11 +877,13 @@ int i915_driver_load(drm_device_t *dev, unsigned long flags)
if (IS_I9XX(dev)) {
dev_priv->mmiobase = drm_get_resource_start(dev, 0);
dev_priv->mmiolen = drm_get_resource_len(dev, 0);
dev_priv->baseaddr = drm_get_resource_start(dev, 2) & 0xff000000;
} else if (drm_get_resource_start(dev, 1)) {
dev_priv->mmiobase = drm_get_resource_start(dev, 1);
dev_priv->mmiolen = drm_get_resource_len(dev, 1);
dev_priv->baseaddr = drm_get_resource_start(dev, 0) & 0xff000000;
} else {
DRM_ERROR("Unable to find MMIO registers\n");
DRM_ERROR("Unable to find MMIO registers or FB\n");
return -ENODEV;
}

1
shared-core/i915_drv.h
View File

@ -92,6 +92,7 @@ typedef struct drm_i915_private {
drm_local_map_t *sarea;
drm_local_map_t *mmio_map;
unsigned long baseaddr;
unsigned long mmiobase;
unsigned long mmiolen;