amdgpu: add amdgpu_va_manager
Until now VA management was tied to a device handle, but there's no reason for this. As a first step to export VA management outside of amdgpu_device, this commit adds a new structure type holding the 4 va_mgr. Reviewed-by: Marek Olšák <marek.olsak@amd.com>main
parent
c8f327ce9c
commit
4376848720
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@ -105,10 +105,10 @@ static void amdgpu_device_free_internal(amdgpu_device_handle dev)
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if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
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if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
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close(dev->flink_fd);
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close(dev->flink_fd);
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amdgpu_vamgr_deinit(&dev->vamgr_32);
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amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_32);
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amdgpu_vamgr_deinit(&dev->vamgr);
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amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_low);
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amdgpu_vamgr_deinit(&dev->vamgr_high_32);
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amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_high_32);
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amdgpu_vamgr_deinit(&dev->vamgr_high);
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amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_high);
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handle_table_fini(&dev->bo_handles);
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handle_table_fini(&dev->bo_handles);
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handle_table_fini(&dev->bo_flink_names);
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handle_table_fini(&dev->bo_flink_names);
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pthread_mutex_destroy(&dev->bo_table_mutex);
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pthread_mutex_destroy(&dev->bo_table_mutex);
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@ -238,24 +238,24 @@ drm_public int amdgpu_device_initialize(int fd,
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start = dev->dev_info.virtual_address_offset;
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start = dev->dev_info.virtual_address_offset;
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max = MIN2(dev->dev_info.virtual_address_max, 0x100000000ULL);
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max = MIN2(dev->dev_info.virtual_address_max, 0x100000000ULL);
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amdgpu_vamgr_init(&dev->vamgr_32, start, max,
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amdgpu_vamgr_init(&dev->va_mgr.vamgr_32, start, max,
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dev->dev_info.virtual_address_alignment);
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dev->dev_info.virtual_address_alignment);
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start = max;
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start = max;
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max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL);
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max = MAX2(dev->dev_info.virtual_address_max, 0x100000000ULL);
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amdgpu_vamgr_init(&dev->vamgr, start, max,
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amdgpu_vamgr_init(&dev->va_mgr.vamgr_low, start, max,
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dev->dev_info.virtual_address_alignment);
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dev->dev_info.virtual_address_alignment);
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start = dev->dev_info.high_va_offset;
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start = dev->dev_info.high_va_offset;
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max = MIN2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) +
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max = MIN2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) +
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0x100000000ULL);
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0x100000000ULL);
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amdgpu_vamgr_init(&dev->vamgr_high_32, start, max,
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amdgpu_vamgr_init(&dev->va_mgr.vamgr_high_32, start, max,
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dev->dev_info.virtual_address_alignment);
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dev->dev_info.virtual_address_alignment);
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start = max;
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start = max;
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max = MAX2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) +
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max = MAX2(dev->dev_info.high_va_max, (start & ~0xffffffffULL) +
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0x100000000ULL);
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0x100000000ULL);
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amdgpu_vamgr_init(&dev->vamgr_high, start, max,
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amdgpu_vamgr_init(&dev->va_mgr.vamgr_high, start, max,
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dev->dev_info.virtual_address_alignment);
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dev->dev_info.virtual_address_alignment);
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amdgpu_parse_asic_ids(dev);
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amdgpu_parse_asic_ids(dev);
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@ -306,10 +306,10 @@ drm_public int amdgpu_query_sw_info(amdgpu_device_handle dev,
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switch (info) {
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switch (info) {
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case amdgpu_sw_info_address32_hi:
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case amdgpu_sw_info_address32_hi:
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if (dev->vamgr_high_32.va_max)
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if (dev->va_mgr.vamgr_high_32.va_max)
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*val32 = (dev->vamgr_high_32.va_max - 1) >> 32;
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*val32 = (dev->va_mgr.vamgr_high_32.va_max - 1) >> 32;
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else
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else
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*val32 = (dev->vamgr_32.va_max - 1) >> 32;
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*val32 = (dev->va_mgr.vamgr_32.va_max - 1) >> 32;
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return 0;
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return 0;
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}
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}
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return -EINVAL;
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return -EINVAL;
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@ -63,6 +63,17 @@ struct amdgpu_va {
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struct amdgpu_bo_va_mgr *vamgr;
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struct amdgpu_bo_va_mgr *vamgr;
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};
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};
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struct amdgpu_va_manager {
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/** The VA manager for the lower virtual address space */
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struct amdgpu_bo_va_mgr vamgr_low;
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/** The VA manager for the 32bit address space */
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struct amdgpu_bo_va_mgr vamgr_32;
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/** The VA manager for the high virtual address space */
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struct amdgpu_bo_va_mgr vamgr_high;
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/** The VA manager for the 32bit high address space */
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struct amdgpu_bo_va_mgr vamgr_high_32;
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};
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struct amdgpu_device {
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struct amdgpu_device {
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atomic_t refcount;
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atomic_t refcount;
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struct amdgpu_device *next;
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struct amdgpu_device *next;
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@ -80,14 +91,8 @@ struct amdgpu_device {
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pthread_mutex_t bo_table_mutex;
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pthread_mutex_t bo_table_mutex;
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struct drm_amdgpu_info_device dev_info;
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struct drm_amdgpu_info_device dev_info;
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struct amdgpu_gpu_info info;
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struct amdgpu_gpu_info info;
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/** The VA manager for the lower virtual address space */
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struct amdgpu_bo_va_mgr vamgr;
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struct amdgpu_va_manager va_mgr;
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/** The VA manager for the 32bit address space */
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struct amdgpu_bo_va_mgr vamgr_32;
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/** The VA manager for the high virtual address space */
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struct amdgpu_bo_va_mgr vamgr_high;
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/** The VA manager for the 32bit high address space */
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struct amdgpu_bo_va_mgr vamgr_high_32;
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};
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};
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struct amdgpu_bo {
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struct amdgpu_bo {
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@ -234,19 +234,19 @@ drm_public int amdgpu_va_range_alloc(amdgpu_device_handle dev,
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int ret;
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int ret;
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/* Clear the flag when the high VA manager is not initialized */
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/* Clear the flag when the high VA manager is not initialized */
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if (flags & AMDGPU_VA_RANGE_HIGH && !dev->vamgr_high_32.va_max)
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if (flags & AMDGPU_VA_RANGE_HIGH && !dev->va_mgr.vamgr_high_32.va_max)
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flags &= ~AMDGPU_VA_RANGE_HIGH;
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flags &= ~AMDGPU_VA_RANGE_HIGH;
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if (flags & AMDGPU_VA_RANGE_HIGH) {
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if (flags & AMDGPU_VA_RANGE_HIGH) {
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if (flags & AMDGPU_VA_RANGE_32_BIT)
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if (flags & AMDGPU_VA_RANGE_32_BIT)
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vamgr = &dev->vamgr_high_32;
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vamgr = &dev->va_mgr.vamgr_high_32;
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else
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else
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vamgr = &dev->vamgr_high;
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vamgr = &dev->va_mgr.vamgr_high;
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} else {
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} else {
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if (flags & AMDGPU_VA_RANGE_32_BIT)
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if (flags & AMDGPU_VA_RANGE_32_BIT)
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vamgr = &dev->vamgr_32;
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vamgr = &dev->va_mgr.vamgr_32;
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else
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else
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vamgr = &dev->vamgr;
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vamgr = &dev->va_mgr.vamgr_low;
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}
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}
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va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
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va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
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@ -259,9 +259,9 @@ drm_public int amdgpu_va_range_alloc(amdgpu_device_handle dev,
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if (!(flags & AMDGPU_VA_RANGE_32_BIT) && ret) {
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if (!(flags & AMDGPU_VA_RANGE_32_BIT) && ret) {
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/* fallback to 32bit address */
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/* fallback to 32bit address */
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if (flags & AMDGPU_VA_RANGE_HIGH)
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if (flags & AMDGPU_VA_RANGE_HIGH)
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vamgr = &dev->vamgr_high_32;
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vamgr = &dev->va_mgr.vamgr_high_32;
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else
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else
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vamgr = &dev->vamgr_32;
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vamgr = &dev->va_mgr.vamgr_32;
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ret = amdgpu_vamgr_find_va(vamgr, size,
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ret = amdgpu_vamgr_find_va(vamgr, size,
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va_base_alignment, va_base_required,
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va_base_alignment, va_base_required,
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search_from_top, va_base_allocated);
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search_from_top, va_base_allocated);
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