Fix some warnings and flush pixel cache in idle routine so readpixels works
correctlymain
parent
62aa46ccec
commit
43f1a52a56
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@ -56,7 +56,10 @@ int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
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if ( status == MGA_ENDPRDMASTS ) return 0;
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if ( status == MGA_ENDPRDMASTS ) {
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MGA_WRITE8( MGA_CRTC_INDEX, 0 );
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return 0;
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}
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udelay( 1 );
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}
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@ -269,7 +272,8 @@ static void mga_freelist_print( drm_device_t *dev )
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DRM_INFO( "\n" );
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DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
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dev_priv->sarea_priv->last_dispatch,
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*dev_priv->prim.head - dev_priv->primary->offset );
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(unsigned int)(*dev_priv->prim.head -
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dev_priv->primary->offset) );
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DRM_INFO( "current freelist:\n" );
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for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
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@ -350,7 +354,6 @@ static void mga_freelist_cleanup( drm_device_t *dev )
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static void mga_freelist_reset( drm_device_t *dev )
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{
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drm_device_dma_t *dma = dev->dma;
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drm_mga_private_t *dev_priv = dev->dev_private;
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drm_buf_t *buf;
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drm_mga_buf_priv_t *buf_priv;
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int i;
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@ -408,15 +411,17 @@ int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
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dev_priv->primary->offset,
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buf_priv->list_entry->age.wrap );
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/* Put buffer on the head + 1, as the head is a sentinal.
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*/
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next = buf_priv->list_entry;
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head = dev_priv->head;
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prev = head->next;
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if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
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SET_AGE( &next->age, MGA_BUFFER_FREE, 0 );
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}
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/* Put buffer on the head + 1, as the head is a sentinal.
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*/
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next = buf_priv->list_entry;
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head = dev_priv->head;
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prev = head->next;
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head->next = next;
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prev->prev = next;
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next->prev = head;
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@ -152,7 +152,8 @@ extern int mga_warp_init( drm_device_t *dev );
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#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg )
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#define MGA_READ( reg ) MGA_DEREF( reg )
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#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
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#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg )
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#define MGA_WRITE8( reg, val ) do { MGA_DEREF8( reg ) = val; } while (0)
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#define DWGREG0 0x1c00
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#define DWGREG0_END 0x1dff
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@ -316,6 +317,7 @@ do { \
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/* A reduced set of the mga registers.
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*/
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#define MGA_CRTC_INDEX 0x1fd4
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#define MGA_ALPHACTRL 0x2c7c
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#define MGA_AR0 0x1c60
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