wrap syncobj timeline query/wait APIs for amdgpu v3
v2: symbos are stored in lexical order. v3: drop export/import and extra query indirection Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>main
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@ -53,8 +53,10 @@ amdgpu_cs_submit_raw
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amdgpu_cs_submit_raw2
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amdgpu_cs_syncobj_export_sync_file
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amdgpu_cs_syncobj_import_sync_file
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amdgpu_cs_syncobj_query
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amdgpu_cs_syncobj_reset
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amdgpu_cs_syncobj_signal
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amdgpu_cs_syncobj_timeline_wait
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amdgpu_cs_syncobj_wait
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amdgpu_cs_wait_fences
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amdgpu_cs_wait_semaphore
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@ -1536,6 +1536,45 @@ int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
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int64_t timeout_nsec, unsigned flags,
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uint32_t *first_signaled);
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/**
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* Wait for one or all sync objects on their points to signal.
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*
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* \param dev - \c [in] self-explanatory
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* \param handles - \c [in] array of sync object handles
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* \param points - \c [in] array of sync points to wait
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* \param num_handles - \c [in] self-explanatory
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* \param timeout_nsec - \c [in] self-explanatory
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* \param flags - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_*
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* \param first_signaled - \c [in] self-explanatory
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*
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* \return 0 on success\n
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* -ETIME - Timeout
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* <0 - Negative POSIX Error code
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*
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*/
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int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
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uint32_t *handles, uint64_t *points,
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unsigned num_handles,
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int64_t timeout_nsec, unsigned flags,
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uint32_t *first_signaled);
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/**
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* Query sync objects payloads.
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*
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* \param dev - \c [in] self-explanatory
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* \param handles - \c [in] array of sync object handles
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* \param points - \c [out] array of sync points returned, which presents
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* syncobj payload.
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* \param num_handles - \c [in] self-explanatory
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*
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* \return 0 on success\n
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* -ETIME - Timeout
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* <0 - Negative POSIX Error code
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*
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*/
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int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
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uint32_t *handles, uint64_t *points,
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unsigned num_handles);
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/**
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* Export kernel sync object to shareable fd.
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*
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@ -686,6 +686,29 @@ drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
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flags, first_signaled);
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}
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drm_public int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
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uint32_t *handles, uint64_t *points,
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unsigned num_handles,
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int64_t timeout_nsec, unsigned flags,
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uint32_t *first_signaled)
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{
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if (NULL == dev)
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return -EINVAL;
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return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles,
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timeout_nsec, flags, first_signaled);
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}
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drm_public int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
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uint32_t *handles, uint64_t *points,
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unsigned num_handles)
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{
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if (NULL == dev)
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return -EINVAL;
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return drmSyncobjQuery(dev->fd, handles, points, num_handles);
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}
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drm_public int amdgpu_cs_export_syncobj(amdgpu_device_handle dev,
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uint32_t handle,
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int *shared_fd)
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