geemili
/
drm
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

radeon: remove unused gem indirect ioctl

main
Dave Airlie 2008-11-03 09:42:01 +10:00
parent f5e6dbef79
commit 4ccec67a23
4 changed files with 0 additions and 84 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
linux-core/radeon_gem.c
View File

@ -424,81 +424,6 @@ int radeon_gem_execbuffer(struct drm_device *dev, void *data,
}
int radeon_gem_indirect_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
struct drm_radeon_gem_indirect *args = data;
struct drm_radeon_private *dev_priv = dev->dev_private;
struct drm_gem_object *obj;
struct drm_radeon_gem_object *obj_priv;
uint32_t start, end;
int ret;
RING_LOCALS;
obj = drm_gem_object_lookup(dev, file_priv, args->handle);
if (obj == NULL)
return -EINVAL;
obj_priv = obj->driver_private;
DRM_DEBUG("got here %p %d\n", obj, args->used);
//RING_SPACE_TEST_WITH_RETURN(dev_priv);
//VB_AGE_TEST_WITH_RETURN(dev_priv);
ret = drm_bo_do_validate(obj_priv->bo, 0, DRM_BO_FLAG_NO_EVICT,
0 , 0);
if (ret)
return ret;
/* Wait for the 3D stream to idle before the indirect buffer
* containing 2D acceleration commands is processed.
*/
BEGIN_RING(2);
RADEON_WAIT_UNTIL_3D_IDLE();
ADVANCE_RING();
start = 0;
end = args->used;
if (start != end) {
int offset = (dev_priv->gart_vm_start +
+ obj_priv->bo->offset + start);
int dwords = (end - start + 3) / sizeof(u32);
/* Fire off the indirect buffer */
BEGIN_RING(3);
OUT_RING(CP_PACKET0(RADEON_CP_IB_BASE, 1));
OUT_RING(offset);
OUT_RING(dwords);
ADVANCE_RING();
}
COMMIT_RING();
/* we need to fence the buffer */
ret = drm_fence_buffer_objects(dev, NULL, 0, NULL, &obj_priv->fence);
if (ret) {
drm_putback_buffer_objects(dev);
ret = 0;
goto fail;
}
/* dereference he fence object */
drm_fence_usage_deref_unlocked(&obj_priv->fence);
mutex_lock(&dev->struct_mutex);
drm_gem_object_unreference(obj);
mutex_unlock(&dev->struct_mutex);
ret = 0;
fail:
return ret;
}
/*
* Depending on card genertation, chipset bugs, etc... the amount of vram
* accessible to the CPU can vary. This function is our best shot at figuring

6
shared-core/radeon_drm.h
View File

@ -511,7 +511,6 @@ typedef struct {
#define DRM_RADEON_GEM_PREAD 0x21
#define DRM_RADEON_GEM_PWRITE 0x22
#define DRM_RADEON_GEM_SET_DOMAIN 0x23
#define DRM_RADEON_GEM_INDIRECT 0x24 // temporary for X server
#define DRM_RADEON_CS 0x25
#define DRM_RADEON_CS2 0x26
@ -552,7 +551,6 @@ typedef struct {
#define DRM_IOCTL_RADEON_GEM_PREAD DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PREAD, struct drm_radeon_gem_pread)
#define DRM_IOCTL_RADEON_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite)
#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain)
#define DRM_IOCTL_RADEON_GEM_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INDIRECT, struct drm_radeon_gem_indirect)
#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
#define DRM_IOCTL_RADEON_CS2 DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS2, struct drm_radeon_cs2)
@ -866,10 +864,6 @@ struct drm_radeon_gem_pwrite {
uint64_t data_ptr; /* void *, but pointers are not 32/64 compatible */
};
struct drm_radeon_gem_indirect {
uint32_t handle;
uint32_t used;
};
/* New interface which obsolete all previous interface.
*/

2
shared-core/radeon_drv.h
View File

@ -1688,8 +1688,6 @@ extern int radeon_gem_unpin_ioctl(struct drm_device *dev, void *data,
int radeon_gem_object_pin(struct drm_gem_object *obj,
uint32_t alignment, uint32_t pin_domain);
int radeon_gem_object_unpin(struct drm_gem_object *obj);
int radeon_gem_indirect_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
struct drm_gem_object *radeon_gem_object_alloc(struct drm_device *dev, int size, int alignment,

1
shared-core/radeon_state.c
View File

@ -3288,7 +3288,6 @@ struct drm_ioctl_desc radeon_ioctls[] = {
DRM_IOCTL_DEF(DRM_RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_GEM_INDIRECT, radeon_gem_indirect_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_CS2, radeon_cs2_ioctl, DRM_AUTH),
};