Sync from r300_reg.h from Mesa.
parent
e9732865b7
commit
534bfb3742
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@ -208,13 +208,13 @@ void r300_init_reg_flags(void)
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ADD_RANGE(0x4F54, 1);
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ADD_RANGE(0x4F54, 1);
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ADD_RANGE(R300_TX_FILTER_0, 16);
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ADD_RANGE(R300_TX_FILTER_0, 16);
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ADD_RANGE(R300_TX_UNK1_0, 16);
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ADD_RANGE(R300_TX_FILTER1_0, 16);
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ADD_RANGE(R300_TX_SIZE_0, 16);
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ADD_RANGE(R300_TX_SIZE_0, 16);
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ADD_RANGE(R300_TX_FORMAT_0, 16);
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ADD_RANGE(R300_TX_FORMAT_0, 16);
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ADD_RANGE(R300_TX_PITCH_0, 16);
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ADD_RANGE(R300_TX_PITCH_0, 16);
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/* Texture offset is dangerous and needs more checking */
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/* Texture offset is dangerous and needs more checking */
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ADD_RANGE_MARK(R300_TX_OFFSET_0, 16, MARK_CHECK_OFFSET);
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ADD_RANGE_MARK(R300_TX_OFFSET_0, 16, MARK_CHECK_OFFSET);
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ADD_RANGE(R300_TX_UNK4_0, 16);
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ADD_RANGE(R300_TX_CHROMA_KEY_0, 16);
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ADD_RANGE(R300_TX_BORDER_COLOR_0, 16);
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ADD_RANGE(R300_TX_BORDER_COLOR_0, 16);
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/* Sporadic registers used as primitives are emitted */
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/* Sporadic registers used as primitives are emitted */
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@ -454,6 +454,9 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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/* END */
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/* END */
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/* gap */
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/* gap */
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/* Zero to flush caches. */
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#define R300_TX_CNTL 0x4100
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/* The upper enable bits are guessed, based on fglrx reported limits. */
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/* The upper enable bits are guessed, based on fglrx reported limits. */
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#define R300_TX_ENABLE 0x4104
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#define R300_TX_ENABLE 0x4104
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# define R300_TX_ENABLE_0 (1 << 0)
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# define R300_TX_ENABLE_0 (1 << 0)
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@ -712,8 +715,22 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
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# define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
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# define R300_TX_MAX_ANISO_MASK (14 << 21)
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# define R300_TX_MAX_ANISO_MASK (14 << 21)
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#define R300_TX_UNK1_0 0x4440
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#define R300_TX_FILTER1_0 0x4440
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# define R300_CHROMA_KEY_MODE_DISABLE 0
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# define R300_CHROMA_KEY_FORCE 1
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# define R300_CHROMA_KEY_BLEND 2
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# define R300_MC_ROUND_NORMAL (0<<2)
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# define R300_MC_ROUND_MPEG4 (1<<2)
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# define R300_LOD_BIAS_MASK 0x1fff
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# define R300_LOD_BIAS_MASK 0x1fff
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# define R300_EDGE_ANISO_EDGE_DIAG (0<<13)
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# define R300_EDGE_ANISO_EDGE_ONLY (1<<13)
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# define R300_MC_COORD_TRUNCATE_DISABLE (0<<14)
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# define R300_MC_COORD_TRUNCATE_MPEG (1<<14)
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# define R300_TX_TRI_PERF_0_8 (0<<15)
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# define R300_TX_TRI_PERF_1_8 (1<<15)
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# define R300_TX_TRI_PERF_1_4 (2<<15)
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# define R300_TX_TRI_PERF_3_8 (3<<15)
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# define R300_ANISO_THRESHOLD_MASK (7<<17)
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#define R300_TX_SIZE_0 0x4480
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#define R300_TX_SIZE_0 0x4480
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# define R300_TX_WIDTHMASK_SHIFT 0
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# define R300_TX_WIDTHMASK_SHIFT 0
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@ -723,6 +740,8 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_TX_UNK23 (1 << 23)
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# define R300_TX_UNK23 (1 << 23)
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# define R300_TX_SIZE_SHIFT 26 /* largest of width, height */
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# define R300_TX_SIZE_SHIFT 26 /* largest of width, height */
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# define R300_TX_SIZE_MASK (15 << 26)
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# define R300_TX_SIZE_MASK (15 << 26)
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# define R300_TX_SIZE_PROJECTED (1<<30)
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# define R300_TX_SIZE_TXPITCH_EN (1<<31)
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#define R300_TX_FORMAT_0 0x44C0
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#define R300_TX_FORMAT_0 0x44C0
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/* The interpretation of the format word by Wladimir van der Laan */
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/* The interpretation of the format word by Wladimir van der Laan */
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/* The X, Y, Z and W refer to the layout of the components.
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/* The X, Y, Z and W refer to the layout of the components.
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@ -752,6 +771,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */
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# define R300_TX_FORMAT_G8R8_G8B8 0x15 /* no swizzle */
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/* 0x16 - some 16 bit green format.. ?? */
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/* 0x16 - some 16 bit green format.. ?? */
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# define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */
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# define R300_TX_FORMAT_UNK25 (1 << 25) /* no swizzle */
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# define R300_TX_FORMAT_CUBIC_MAP (1 << 26)
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/* gap */
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/* gap */
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/* Floating point formats */
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/* Floating point formats */
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@ -801,17 +821,19 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_TX_FORMAT_YUV_MODE 0x00800000
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# define R300_TX_FORMAT_YUV_MODE 0x00800000
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#define R300_TX_PITCH_0 0x4500
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#define R300_TX_PITCH_0 0x4500 /* obvious missing in gap */
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#define R300_TX_OFFSET_0 0x4540
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#define R300_TX_OFFSET_0 0x4540
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/* BEGIN: Guess from R200 */
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/* BEGIN: Guess from R200 */
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# define R300_TXO_ENDIAN_NO_SWAP (0 << 0)
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# define R300_TXO_ENDIAN_NO_SWAP (0 << 0)
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# define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0)
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# define R300_TXO_ENDIAN_BYTE_SWAP (1 << 0)
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# define R300_TXO_ENDIAN_WORD_SWAP (2 << 0)
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# define R300_TXO_ENDIAN_WORD_SWAP (2 << 0)
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# define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
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# define R300_TXO_ENDIAN_HALFDW_SWAP (3 << 0)
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# define R300_TXO_MACRO_TILE (1 << 2)
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# define R300_TXO_MICRO_TILE (1 << 3)
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# define R300_TXO_OFFSET_MASK 0xffffffe0
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# define R300_TXO_OFFSET_MASK 0xffffffe0
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# define R300_TXO_OFFSET_SHIFT 5
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# define R300_TXO_OFFSET_SHIFT 5
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/* END */
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/* END */
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#define R300_TX_UNK4_0 0x4580
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#define R300_TX_CHROMA_KEY_0 0x4580 /* 32 bit chroma key */
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#define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 }
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#define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 }
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/* END */
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/* END */
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@ -869,7 +891,9 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12)
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# define R300_PFS_NODE_TEX_OFFSET_MASK (31 << 12)
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# define R300_PFS_NODE_TEX_END_SHIFT 17
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# define R300_PFS_NODE_TEX_END_SHIFT 17
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# define R300_PFS_NODE_TEX_END_MASK (31 << 17)
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# define R300_PFS_NODE_TEX_END_MASK (31 << 17)
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# define R300_PFS_NODE_LAST_NODE (1 << 22)
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/*# define R300_PFS_NODE_LAST_NODE (1 << 22) */
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# define R300_PFS_NODE_OUTPUT_COLOR (1 << 22)
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# define R300_PFS_NODE_OUTPUT_DEPTH (1 << 23)
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/* TEX
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/* TEX
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// As far as I can tell, texture instructions cannot write into output
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// As far as I can tell, texture instructions cannot write into output
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@ -888,6 +912,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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*/
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*/
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# define R300_FPITX_OPCODE_SHIFT 15
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# define R300_FPITX_OPCODE_SHIFT 15
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# define R300_FPITX_OP_TEX 1
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# define R300_FPITX_OP_TEX 1
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# define R300_FPITX_OP_KIL 2
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# define R300_FPITX_OP_TXP 3
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# define R300_FPITX_OP_TXP 3
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# define R300_FPITX_OP_TXB 4
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# define R300_FPITX_OP_TXB 4
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@ -963,9 +988,11 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_FPI1_SRC2C_CONST (1 << 17)
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# define R300_FPI1_SRC2C_CONST (1 << 17)
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# define R300_FPI1_DSTC_SHIFT 18
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# define R300_FPI1_DSTC_SHIFT 18
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# define R300_FPI1_DSTC_MASK (31 << 18)
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# define R300_FPI1_DSTC_MASK (31 << 18)
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# define R300_FPI1_DSTC_REG_MASK_SHIFT 23
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# define R300_FPI1_DSTC_REG_X (1 << 23)
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# define R300_FPI1_DSTC_REG_X (1 << 23)
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# define R300_FPI1_DSTC_REG_Y (1 << 24)
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# define R300_FPI1_DSTC_REG_Y (1 << 24)
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# define R300_FPI1_DSTC_REG_Z (1 << 25)
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# define R300_FPI1_DSTC_REG_Z (1 << 25)
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# define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT 26
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# define R300_FPI1_DSTC_OUTPUT_X (1 << 26)
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# define R300_FPI1_DSTC_OUTPUT_X (1 << 26)
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# define R300_FPI1_DSTC_OUTPUT_Y (1 << 27)
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# define R300_FPI1_DSTC_OUTPUT_Y (1 << 27)
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# define R300_FPI1_DSTC_OUTPUT_Z (1 << 28)
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# define R300_FPI1_DSTC_OUTPUT_Z (1 << 28)
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@ -984,6 +1011,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_FPI3_DSTA_MASK (31 << 18)
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# define R300_FPI3_DSTA_MASK (31 << 18)
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# define R300_FPI3_DSTA_REG (1 << 23)
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# define R300_FPI3_DSTA_REG (1 << 23)
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# define R300_FPI3_DSTA_OUTPUT (1 << 24)
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# define R300_FPI3_DSTA_OUTPUT (1 << 24)
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# define R300_FPI3_DSTA_DEPTH (1 << 27)
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#define R300_PFS_INSTR0_0 0x48C0
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#define R300_PFS_INSTR0_0 0x48C0
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# define R300_FPI0_ARGC_SRC0C_XYZ 0
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# define R300_FPI0_ARGC_SRC0C_XYZ 0
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@ -1037,7 +1065,7 @@ I am fairly certain that they are correct unless stated otherwise in comments.
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# define R300_FPI0_OUTC_FRC (9 << 23)
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# define R300_FPI0_OUTC_FRC (9 << 23)
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# define R300_FPI0_OUTC_REPL_ALPHA (10 << 23)
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# define R300_FPI0_OUTC_REPL_ALPHA (10 << 23)
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# define R300_FPI0_OUTC_SAT (1 << 30)
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# define R300_FPI0_OUTC_SAT (1 << 30)
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# define R300_FPI0_UNKNOWN_31 (1 << 31)
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# define R300_FPI0_INSERT_NOP (1 << 31)
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#define R300_PFS_INSTR2_0 0x49C0
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#define R300_PFS_INSTR2_0 0x49C0
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# define R300_FPI2_ARGA_SRC0C_X 0
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# define R300_FPI2_ARGA_SRC0C_X 0
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