intel: Reorder need_fence vs fenced_command to avoid fences on gen4
gen4+ hardware doesn't use fences for GPU access and the older kernel doesn't expect userspace to make such a mistake. So don't. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32190 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>main
parent
39e5e98224
commit
537703fd48
|
@ -1303,7 +1303,7 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
|
|||
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
|
||||
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
|
||||
drm_intel_bo_gem *target_bo_gem = (drm_intel_bo_gem *) target_bo;
|
||||
int fenced_command = need_fence;
|
||||
int fenced_command;
|
||||
|
||||
if (bo_gem->has_error)
|
||||
return -ENOMEM;
|
||||
|
@ -1313,13 +1313,14 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
if (target_bo_gem->tiling_mode == I915_TILING_NONE)
|
||||
need_fence = 0;
|
||||
|
||||
/* We never use HW fences for rendering on 965+ */
|
||||
if (bufmgr_gem->gen >= 4)
|
||||
need_fence = 0;
|
||||
|
||||
fenced_command = need_fence;
|
||||
if (target_bo_gem->tiling_mode == I915_TILING_NONE)
|
||||
need_fence = 0;
|
||||
|
||||
/* Create a new relocation list if needed */
|
||||
if (bo_gem->relocs == NULL && drm_intel_setup_reloc_list(bo))
|
||||
return -ENOMEM;
|
||||
|
|
Loading…
Reference in New Issue