intel: Add the Gen6+ version of MI_REPORT_PERF_COUNT to intel_decode.c.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>main
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@ -257,6 +257,7 @@ decode_mi(struct drm_intel_decode *ctx)
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{ 0x03, 0, 1, 1, "MI_WAIT_FOR_EVENT", decode_MI_WAIT_FOR_EVENT },
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{ 0x16, 0x7f, 3, 3, "MI_SEMAPHORE_MBOX" },
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{ 0x26, 0x1f, 3, 4, "MI_FLUSH_DW" },
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{ 0x28, 0x3f, 3, 3, "MI_REPORT_PERF_COUNT" },
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{ 0x0b, 0, 1, 1, "MI_SUSPEND_FLUSH"},
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}, *opcode_mi = NULL;
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