nouveau: read gpu type once
parent
05d3ed472e
commit
5534c90ff3
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@ -532,7 +532,7 @@ static int nv17_graph_ctx_regs [] = {
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void nouveau_nv10_context_switch(drm_device_t *dev)
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{
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drm_nouveau_private_t *dev_priv = dev->dev_private;
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int channel, channel_old, i;
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int channel, channel_old, i, gpu_type;
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channel=NV_READ(NV_PFIFO_CACH1_PSH1)&(nouveau_fifo_number(dev)-1);
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channel_old = (NV_READ(NV_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1);
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@ -549,8 +549,10 @@ void nouveau_nv10_context_switch(drm_device_t *dev)
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// save PGRAPH context
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for (i = 0; nv10_graph_ctx_regs[i]; i++)
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dev_priv->fifos[channel_old].nv10_pgraph_ctx[i] = NV_READ(nv10_graph_ctx_regs[i]);
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if ((NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01700000)
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|| (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01800000))
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gpu_type = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000);
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if ((gpu_type==0x01700000)
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|| (gpu_type==0x01800000)
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|| (gpu_type==0x01f00000))
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{
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for (; nv17_graph_ctx_regs[i]; i++)
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dev_priv->fifos[channel_old].nv10_pgraph_ctx[i] = NV_READ(nv17_graph_ctx_regs[i]);
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@ -567,8 +569,9 @@ void nouveau_nv10_context_switch(drm_device_t *dev)
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#if 0
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for (i = 0; nv10_graph_ctx_regs[i]; i++)
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NV_WRITE(nv10_graph_ctx_regs[i], dev_priv->fifos[channel].nv10_pgraph_ctx[i]);
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if ((NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01700000)
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|| (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01800000))
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if ((gpu_type==0x01700000)
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|| (gpu_type==0x01800000)
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|| (gpu_type==0x01f00000))
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{
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for (; nv17_graph_ctx_regs[i]; i++)
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NV_WRITE(nv17_graph_ctx_regs[i], dev_priv->fifos[channel].nv10_pgraph_ctx[i]);
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