amdgpu: add base_preferred parameter to amdgpu_vamgr_find_va
base_preferred parameter is added to amdgpu_vamgr_find_va so UMD can specify preferred va address when allocating. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>main
parent
8097d08ee4
commit
5b01908d1c
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@ -62,7 +62,7 @@ static int amdgpu_bo_map(amdgpu_bo_handle bo, uint32_t alignment)
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memset(&va, 0, sizeof(va));
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bo->virtual_mc_base_address = amdgpu_vamgr_find_va(dev->vamgr,
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bo->alloc_size, alignment);
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bo->alloc_size, alignment, 0);
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if (bo->virtual_mc_base_address == AMDGPU_INVALID_VA_ADDRESS)
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return -ENOSPC;
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@ -123,8 +123,8 @@ struct amdgpu_bo_va_mgr* amdgpu_vamgr_get_global(struct amdgpu_device *dev);
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void amdgpu_vamgr_reference(struct amdgpu_bo_va_mgr **dst, struct amdgpu_bo_va_mgr *src);
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uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
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uint64_t size, uint64_t alignment);
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uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
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uint64_t alignment, uint64_t base_preferred);
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void amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va,
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uint64_t size);
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@ -68,8 +68,8 @@ void amdgpu_vamgr_reference(struct amdgpu_bo_va_mgr **dst,
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*dst = src;
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}
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uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
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uint64_t size, uint64_t alignment)
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uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
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uint64_t alignment, uint64_t base_required)
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{
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struct amdgpu_bo_va_hole *hole, *n;
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uint64_t offset = 0, waste = 0;
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@ -77,16 +77,27 @@ uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
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alignment = MAX2(alignment, mgr->va_alignment);
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size = ALIGN(size, mgr->va_alignment);
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if (base_required % alignment)
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return AMDGPU_INVALID_VA_ADDRESS;
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pthread_mutex_lock(&mgr->bo_va_mutex);
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/* TODO: using more appropriate way to track the holes */
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/* first look for a hole */
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LIST_FOR_EACH_ENTRY_SAFE(hole, n, &mgr->va_holes, list) {
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offset = hole->offset;
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waste = offset % alignment;
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waste = waste ? alignment - waste : 0;
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offset += waste;
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if (offset >= (hole->offset + hole->size)) {
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continue;
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LIST_FOR_EACH_ENTRY_SAFE(hole, n, &vamgr.va_holes, list) {
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if (base_required) {
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if(hole->offset > base_required ||
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(hole->offset + hole->size) < (base_required + size))
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continue;
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waste = base_required - hole->offset;
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offset = base_required;
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} else {
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offset = hole->offset;
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waste = offset % alignment;
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waste = waste ? alignment - waste : 0;
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offset += waste;
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if (offset >= (hole->offset + hole->size)) {
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continue;
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}
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}
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if (!waste && hole->size == size) {
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offset = hole->offset;
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@ -97,8 +108,7 @@ uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
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}
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if ((hole->size - waste) > size) {
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if (waste) {
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n = calloc(1,
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sizeof(struct amdgpu_bo_va_hole));
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n = calloc(1, sizeof(struct amdgpu_bo_va_hole));
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n->size = waste;
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n->offset = hole->offset;
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list_add(&n->list, &hole->list);
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@ -115,9 +125,16 @@ uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
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}
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}
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offset = mgr->va_offset;
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waste = offset % alignment;
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waste = waste ? alignment - waste : 0;
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if (base_required) {
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if (base_required < mgr->va_offset)
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return AMDGPU_INVALID_VA_ADDRESS;
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offset = mgr->va_offset;
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waste = base_required - mgr->va_offset;
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} else {
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offset = mgr->va_offset;
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waste = offset % alignment;
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waste = waste ? alignment - waste : 0;
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}
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if (offset + waste + size > mgr->va_max) {
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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@ -130,6 +147,7 @@ uint64_t amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr,
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n->offset = offset;
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list_add(&n->list, &mgr->va_holes);
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}
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offset += waste;
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mgr->va_offset += size + waste;
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pthread_mutex_unlock(&mgr->bo_va_mutex);
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