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tests/amdgpu: add gfx ring draw hang test 

for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
main
Flora Cui 2019-03-18 14:14:42 +08:00 committed by Marek Olšák
parent 71b9e68d99
commit 5e1f6533a0
4 changed files with 55 additions and 14 deletions
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5
tests/amdgpu/amdgpu_test.c
View File

@ -476,6 +476,11 @@ static void amdgpu_disable_suites()
"compute ring bad slow dispatch test (set amdgpu.lockup_timeout=50,50)", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());
//if (family_id < AMDGPU_FAMILY_AI || family_id > AMDGPU_FAMILY_RV)
if (amdgpu_set_test_active(DEADLOCK_TESTS_STR,
"gfx ring bad draw test (set amdgpu.lockup_timeout=50)", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());
if (amdgpu_set_test_active(BO_TESTS_STR, "Metadata", CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n", CU_get_error_msg());

3
tests/amdgpu/amdgpu_test.h
View File

@ -238,7 +238,8 @@ extern CU_TestInfo syncobj_timeline_tests[];
void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
int hang);
/**
* Helper functions
*/

27
tests/amdgpu/basic_tests.c
View File

@ -357,7 +357,8 @@ static const uint32_t preamblecache_gfx9[] = {
enum ps_type {
PS_CONST,
PS_TEX
PS_TEX,
PS_HANG
};
static const uint32_t ps_const_shader_gfx9[] = {
@ -2783,6 +2784,12 @@ static int amdgpu_draw_load_ps_shader(uint8_t *ptr, int ps_type)
patchinfo_code_size = ps_tex_shader_patchinfo_code_size_gfx9;
patchcode_offset = ps_tex_shader_patchinfo_offset_gfx9;
break;
case PS_HANG:
shader = memcpy_ps_hang;
shader_size = sizeof(memcpy_ps_hang);
memcpy(ptr, shader, shader_size);
return 0;
default:
return -1;
break;
@ -3236,7 +3243,7 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle device_handle,
amdgpu_bo_handle bo_shader_vs,
uint64_t mc_address_shader_ps,
uint64_t mc_address_shader_vs,
uint32_t ring)
uint32_t ring, int hang)
{
amdgpu_context_handle context_handle;
amdgpu_bo_handle bo_dst, bo_src, bo_cmd, resources[5];
@ -3341,6 +3348,7 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle device_handle,
r = amdgpu_cs_query_fence_status(&fence_status,
AMDGPU_TIMEOUT_INFINITE,
0, &expired);
if (!hang) {
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(expired, true);
@ -3350,6 +3358,11 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle device_handle,
CU_ASSERT_EQUAL(ptr_dst[i], ptr_src[i]);
i++;
}
} else {
r = amdgpu_cs_query_reset_state(context_handle, &hang_state, &hangs);
CU_ASSERT_EQUAL(r, 0);
CU_ASSERT_EQUAL(hang_state, AMDGPU_CTX_UNKNOWN_RESET);
}
r = amdgpu_bo_list_destroy(bo_list);
CU_ASSERT_EQUAL(r, 0);
@ -3366,7 +3379,8 @@ static void amdgpu_memcpy_draw(amdgpu_device_handle device_handle,
CU_ASSERT_EQUAL(r, 0);
}
static void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring)
void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
int hang)
{
amdgpu_bo_handle bo_shader_ps, bo_shader_vs;
void *ptr_shader_ps;
@ -3374,6 +3388,7 @@ static void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t
uint64_t mc_address_shader_ps, mc_address_shader_vs;
amdgpu_va_handle va_shader_ps, va_shader_vs;
int bo_shader_size = 4096;
enum ps_type ps_type = hang ? PS_HANG : PS_TEX;
int r;
r = amdgpu_bo_alloc_and_map(device_handle, bo_shader_size, 4096,
@ -3390,14 +3405,14 @@ static void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t
CU_ASSERT_EQUAL(r, 0);
memset(ptr_shader_vs, 0, bo_shader_size);
r = amdgpu_draw_load_ps_shader(ptr_shader_ps, PS_TEX);
r = amdgpu_draw_load_ps_shader(ptr_shader_ps, ps_type);
CU_ASSERT_EQUAL(r, 0);
r = amdgpu_draw_load_vs_shader(ptr_shader_vs);
CU_ASSERT_EQUAL(r, 0);
amdgpu_memcpy_draw(device_handle, bo_shader_ps, bo_shader_vs,
mc_address_shader_ps, mc_address_shader_vs, ring);
mc_address_shader_ps, mc_address_shader_vs, ring, hang);
r = amdgpu_bo_unmap_and_free(bo_shader_ps, va_shader_ps, mc_address_shader_ps, bo_shader_size);
CU_ASSERT_EQUAL(r, 0);
@ -3419,7 +3434,7 @@ static void amdgpu_draw_test(void)
for (ring_id = 0; (1 << ring_id) & info.available_rings; ring_id++) {
amdgpu_memset_draw_test(device_handle, ring_id);
amdgpu_memcpy_draw_test(device_handle, ring_id);
amdgpu_memcpy_draw_test(device_handle, ring_id, 0);
}
}

20
tests/amdgpu/deadlock_tests.c
View File

@ -118,6 +118,7 @@ static void amdgpu_dispatch_hang_gfx(void);
static void amdgpu_dispatch_hang_compute(void);
static void amdgpu_dispatch_hang_slow_gfx(void);
static void amdgpu_dispatch_hang_slow_compute(void);
static void amdgpu_draw_hang_gfx(void);
CU_BOOL suite_deadlock_tests_enable(void)
{
@ -186,6 +187,7 @@ CU_TestInfo deadlock_tests[] = {
{ "compute ring bad dispatch test (set amdgpu.lockup_timeout=50,50)", amdgpu_dispatch_hang_compute },
{ "gfx ring bad slow dispatch test (set amdgpu.lockup_timeout=50)", amdgpu_dispatch_hang_slow_gfx },
{ "compute ring bad slow dispatch test (set amdgpu.lockup_timeout=50,50)", amdgpu_dispatch_hang_slow_compute },
{ "gfx ring bad draw test (set amdgpu.lockup_timeout=50)", amdgpu_draw_hang_gfx },
CU_TEST_INFO_NULL,
};
@ -506,3 +508,21 @@ static void amdgpu_dispatch_hang_slow_compute(void)
{
amdgpu_dispatch_hang_slow_helper(device_handle, AMDGPU_HW_IP_COMPUTE);
}
static void amdgpu_draw_hang_gfx(void)
{
int r;
struct drm_amdgpu_info_hw_ip info;
uint32_t ring_id;
r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_GFX, 0, &info);
CU_ASSERT_EQUAL(r, 0);
if (!info.available_rings)
printf("SKIP ... as there's no graphic ring\n");
for (ring_id = 0; (1 << ring_id) & info.available_rings; ring_id++) {
amdgpu_memcpy_draw_test(device_handle, ring_id, 0);
amdgpu_memcpy_draw_test(device_handle, ring_id, 1);
amdgpu_memcpy_draw_test(device_handle, ring_id, 0);
}
}