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Merge of tdfx branch undid the changes from the 2.4.0-test8-pre5 kernel 

sync, so apply them again.
main
Gareth Hughes 2000-09-07 20:42:32 +00:00
parent f1bb3c5f5f
commit 5f2cfc5bd8
3 changed files with 3 additions and 23 deletions
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4
linux/mga_dma.c
View File

@ -416,9 +416,7 @@ void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim)
}
}
#ifdef __i386__
mga_flush_write_combine();
#endif
atomic_inc(&dev_priv->pending_bufs);
MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
@ -816,9 +814,7 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
* the status register will be correct
*/
#ifdef __i386__
mga_flush_write_combine();
#endif
MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) |

14
linux/mga_state.c
View File

@ -218,8 +218,8 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
/* This takes 25 dwords */
PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable |
0x00008000);
PRIMOUTREG(MGAREG_TEXCTL2,
regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
@ -873,9 +873,7 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
clear.clear_color_mask,
clear.clear_depth_mask);
PRIMUPDATE(dev_priv);
#ifdef __i386__
mga_flush_write_combine();
#endif
mga_dma_schedule(dev, 1);
return 0;
}
@ -905,9 +903,7 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
PRIMUPDATE(dev_priv);
set_bit(MGA_BUF_SWAP_PENDING,
&dev_priv->current_prim->buffer_status);
#ifdef __i386__
mga_flush_write_combine();
#endif
mga_dma_schedule(dev, 1);
return 0;
}
@ -955,9 +951,7 @@ int mga_iload(struct inode *inode, struct file *filp,
AGEBUF(dev_priv, buf_priv);
buf_priv->discard = 1;
mga_freelist_put(dev, buf);
#ifdef __i386__
mga_flush_write_combine();
#endif
mga_dma_schedule(dev, 1);
return 0;
}
@ -1005,9 +999,7 @@ int mga_vertex(struct inode *inode, struct file *filp,
mga_dma_dispatch_vertex(dev, buf);
PRIMUPDATE(dev_priv);
#ifdef __i386__
mga_flush_write_combine();
#endif
mga_dma_schedule(dev, 1);
return 0;
}
@ -1054,9 +1046,7 @@ int mga_indices(struct inode *inode, struct file *filp,
mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
PRIMUPDATE(dev_priv);
#ifdef __i386__
mga_flush_write_combine();
#endif
mga_dma_schedule(dev, 1);
return 0;
}

6
linux/r128_dma.c
View File

@ -480,10 +480,8 @@ static int r128_submit_packets_ring_secure(drm_device_t *dev,
dev_priv->ring_start,
write * sizeof(u32));
#ifdef __i386__
/* Make sure WC cache has been flushed */
r128_flush_write_combine();
#endif
dev_priv->sarea_priv->ring_write = write;
R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@ -585,10 +583,8 @@ static int r128_submit_packets_ring(drm_device_t *dev,
dev_priv->ring_start,
write * sizeof(u32));
#ifdef __i386__
/* Make sure WC cache has been flushed */
r128_flush_write_combine();
#endif
dev_priv->sarea_priv->ring_write = write;
R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write);
@ -756,10 +752,8 @@ static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v)
r128_mark_vertbufs_done(dev);
}
#ifdef __i386__
/* Make sure WC cache has been flushed (if in PIO mode) */
if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine();
#endif
/* FIXME: Add support for sending vertex buffer to the CCE here
instead of in client code. The v->prim holds the primitive