tests/amdgpu/vcn: add unified queue support in vcn4
add unified queue headers on the existing tests. Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>main
Ruijing Dong
Leo Liu
parent
8be3042864
commit
6070e6a798
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@ -63,6 +63,7 @@
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#define DECODE_CMDBUF_FLAGS_SESSION_CONTEXT_BUFFER (0x00100000)
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static bool vcn_dec_sw_ring = false;
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static bool vcn_unified_ring = false;
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#define H264_NAL_TYPE_NON_IDR_SLICE 1
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#define H264_NAL_TYPE_DP_A_SLICE 2
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@ -172,6 +173,9 @@ static amdgpu_bo_handle ib_handle;
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static amdgpu_va_handle ib_va_handle;
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static uint64_t ib_mc_address;
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static uint32_t *ib_cpu;
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static uint32_t *ib_checksum;
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static uint32_t *ib_size_in_dw;
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static rvcn_decode_buffer_t *decode_buffer;
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static amdgpu_bo_handle resources[MAX_RESOURCES];
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@ -185,8 +189,8 @@ static struct amdgpu_vcn_reg reg[] = {
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};
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uint32_t gWidth, gHeight, gSliceType;
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struct drm_amdgpu_info_hw_ip einfo;
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static uint32_t vcn_ip_version_major;
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static uint32_t vcn_ip_version_minor;
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static void amdgpu_cs_vcn_dec_create(void);
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static void amdgpu_cs_vcn_dec_decode(void);
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static void amdgpu_cs_vcn_dec_destroy(void);
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@ -195,6 +199,8 @@ static void amdgpu_cs_vcn_enc_create(void);
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static void amdgpu_cs_vcn_enc_encode(void);
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static void amdgpu_cs_vcn_enc_destroy(void);
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static void amdgpu_cs_sq_head(uint32_t *base, int *offset, bool enc);
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static void amdgpu_cs_sq_ib_tail(uint32_t *end);
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static void h264_check_0s (bufferInfo * bufInfo, int count);
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static int32_t h264_se (bufferInfo * bufInfo);
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static inline uint32_t bs_read_u1(bufferInfo *bufinfo);
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@ -224,7 +230,8 @@ CU_TestInfo vcn_tests[] = {
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CU_BOOL suite_vcn_tests_enable(void)
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{
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struct drm_amdgpu_info_hw_ip info;
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int r, ret;
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bool enc_ring, dec_ring;
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int r;
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if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
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&minor_version, &device_handle))
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@ -235,13 +242,31 @@ CU_BOOL suite_vcn_tests_enable(void)
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chip_rev = device_handle->info.chip_rev;
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chip_id = device_handle->info.chip_external_rev;
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r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_VCN_DEC, 0, &info);
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ret = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_VCN_ENC, 0, &einfo);
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r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_VCN_ENC, 0, &info);
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if (!r) {
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vcn_ip_version_major = info.hw_ip_version_major;
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vcn_ip_version_minor = info.hw_ip_version_minor;
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enc_ring = !!info.available_rings;
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/* in vcn 4.0 it re-uses encoding queue as unified queue */
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if (vcn_ip_version_major >= 4) {
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vcn_unified_ring = true;
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vcn_dec_sw_ring = true;
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dec_ring = enc_ring;
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} else {
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r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_VCN_DEC, 0, &info);
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dec_ring = !!info.available_rings;
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}
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}
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if (amdgpu_device_deinitialize(device_handle))
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return CU_FALSE;
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if (r != 0 || !info.available_rings ||
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if (r) {
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printf("\n\nASIC query hw info failed\n");
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return CU_FALSE;
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}
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if (!(dec_ring || enc_ring) ||
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(family_id < AMDGPU_FAMILY_RV &&
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(family_id == AMDGPU_FAMILY_AI &&
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(chip_id - chip_rev) < 0x32))) { /* Arcturus */
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@ -249,22 +274,25 @@ CU_BOOL suite_vcn_tests_enable(void)
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return CU_FALSE;
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}
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if (family_id == AMDGPU_FAMILY_AI || (ret != 0) ||
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(!einfo.available_rings)) {
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if (!dec_ring) {
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amdgpu_set_test_active("VCN Tests", "VCN DEC create", CU_FALSE);
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amdgpu_set_test_active("VCN Tests", "VCN DEC decode", CU_FALSE);
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amdgpu_set_test_active("VCN Tests", "VCN DEC destroy", CU_FALSE);
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}
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if (family_id == AMDGPU_FAMILY_AI || !enc_ring) {
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amdgpu_set_test_active("VCN Tests", "VCN ENC create", CU_FALSE);
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amdgpu_set_test_active("VCN Tests", "VCN ENC encode", CU_FALSE);
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amdgpu_set_test_active("VCN Tests", "VCN ENC destroy", CU_FALSE);
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}
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if (info.hw_ip_version_major == 1)
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if (vcn_ip_version_major == 1)
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vcn_reg_index = 0;
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else if (info.hw_ip_version_major == 2 && info.hw_ip_version_minor == 0)
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else if (vcn_ip_version_major == 2 && vcn_ip_version_minor == 0)
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vcn_reg_index = 1;
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else if ((info.hw_ip_version_major == 2 && info.hw_ip_version_minor >= 5) ||
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info.hw_ip_version_major == 3)
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else if ((vcn_ip_version_major == 2 && vcn_ip_version_minor >= 5) ||
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vcn_ip_version_major == 3)
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vcn_reg_index = 2;
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else
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vcn_dec_sw_ring = true;
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return CU_TRUE;
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}
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@ -314,6 +342,43 @@ int suite_vcn_tests_clean(void)
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return CUE_SUCCESS;
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}
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static void amdgpu_cs_sq_head(uint32_t *base, int *offset, bool enc)
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{
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/* signature */
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*(base + (*offset)++) = 0x00000010;
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*(base + (*offset)++) = 0x30000002;
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ib_checksum = base + (*offset)++;
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ib_size_in_dw = base + (*offset)++;
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/* engine info */
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*(base + (*offset)++) = 0x00000010;
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*(base + (*offset)++) = 0x30000001;
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*(base + (*offset)++) = enc ? 2 : 3;
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*(base + (*offset)++) = 0x00000000;
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}
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static void amdgpu_cs_sq_ib_tail(uint32_t *end)
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{
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uint32_t size_in_dw;
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uint32_t checksum = 0;
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/* if the pointers are invalid, no need to process */
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if (ib_checksum == NULL || ib_size_in_dw == NULL)
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return;
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size_in_dw = end - ib_size_in_dw - 1;
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*ib_size_in_dw = size_in_dw;
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*(ib_size_in_dw + 4) = size_in_dw * sizeof(uint32_t);
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for (int i = 0; i < size_in_dw; i++)
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checksum += *(ib_checksum + 2 + i);
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*ib_checksum = checksum;
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ib_checksum = NULL;
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ib_size_in_dw = NULL;
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}
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static int submit(unsigned ndw, unsigned ip)
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{
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struct amdgpu_cs_request ibs_request = {0};
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@ -419,10 +484,15 @@ static void vcn_dec_cmd(uint64_t addr, unsigned cmd, int *idx)
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/* Support decode software ring message */
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if (!(*idx)) {
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rvcn_decode_ib_package_t *ib_header = (rvcn_decode_ib_package_t *)ib_cpu;
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rvcn_decode_ib_package_t *ib_header;
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if (vcn_unified_ring)
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amdgpu_cs_sq_head(ib_cpu, idx, false);
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ib_header = (rvcn_decode_ib_package_t *)&ib_cpu[*idx];
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ib_header->package_size = sizeof(struct rvcn_decode_buffer_s) +
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sizeof(struct rvcn_decode_ib_package_s);
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(*idx)++;
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ib_header->package_type = (DECODE_IB_PARAM_DECODE_BUFFER);
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(*idx)++;
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@ -486,6 +556,7 @@ static void vcn_dec_cmd(uint64_t addr, unsigned cmd, int *idx)
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static void amdgpu_cs_vcn_dec_create(void)
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{
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struct amdgpu_vcn_bo msg_buf;
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unsigned ip;
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int len, r;
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num_resources = 0;
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@ -500,9 +571,9 @@ static void amdgpu_cs_vcn_dec_create(void)
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memcpy(msg_buf.ptr, vcn_dec_create_msg, sizeof(vcn_dec_create_msg));
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len = 0;
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if (vcn_dec_sw_ring == true) {
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if (vcn_dec_sw_ring == true)
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vcn_dec_cmd(msg_buf.addr, 0, &len);
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} else {
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else {
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ib_cpu[len++] = reg[vcn_reg_index].data0;
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ib_cpu[len++] = msg_buf.addr;
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ib_cpu[len++] = reg[vcn_reg_index].data1;
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@ -515,7 +586,14 @@ static void amdgpu_cs_vcn_dec_create(void)
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}
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}
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r = submit(len, AMDGPU_HW_IP_VCN_DEC);
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if (vcn_unified_ring) {
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amdgpu_cs_sq_ib_tail(ib_cpu + len);
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ip = AMDGPU_HW_IP_VCN_ENC;
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} else
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ip = AMDGPU_HW_IP_VCN_DEC;
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r = submit(len, ip);
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CU_ASSERT_EQUAL(r, 0);
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free_resource(&msg_buf);
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@ -527,6 +605,7 @@ static void amdgpu_cs_vcn_dec_decode(void)
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uint64_t msg_addr, fb_addr, bs_addr, dpb_addr, ctx_addr, dt_addr, it_addr, sum;
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struct amdgpu_vcn_bo dec_buf;
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int size, len, i, r;
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unsigned ip;
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uint8_t *dec;
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size = 4*1024; /* msg */
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@ -588,7 +667,13 @@ static void amdgpu_cs_vcn_dec_decode(void)
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}
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}
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r = submit(len, AMDGPU_HW_IP_VCN_DEC);
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if (vcn_unified_ring) {
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amdgpu_cs_sq_ib_tail(ib_cpu + len);
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ip = AMDGPU_HW_IP_VCN_ENC;
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} else
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ip = AMDGPU_HW_IP_VCN_DEC;
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r = submit(len, ip);
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CU_ASSERT_EQUAL(r, 0);
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for (i = 0, sum = 0; i < dt_size; ++i)
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@ -602,6 +687,7 @@ static void amdgpu_cs_vcn_dec_decode(void)
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static void amdgpu_cs_vcn_dec_destroy(void)
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{
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struct amdgpu_vcn_bo msg_buf;
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unsigned ip;
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int len, r;
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num_resources = 0;
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@ -616,9 +702,9 @@ static void amdgpu_cs_vcn_dec_destroy(void)
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memcpy(msg_buf.ptr, vcn_dec_destroy_msg, sizeof(vcn_dec_destroy_msg));
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len = 0;
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if (vcn_dec_sw_ring == true) {
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if (vcn_dec_sw_ring == true)
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vcn_dec_cmd(msg_buf.addr, 0, &len);
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} else {
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else {
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ib_cpu[len++] = reg[vcn_reg_index].data0;
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ib_cpu[len++] = msg_buf.addr;
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ib_cpu[len++] = reg[vcn_reg_index].data1;
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@ -631,7 +717,13 @@ static void amdgpu_cs_vcn_dec_destroy(void)
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}
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}
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r = submit(len, AMDGPU_HW_IP_VCN_DEC);
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if (vcn_unified_ring) {
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amdgpu_cs_sq_ib_tail(ib_cpu + len);
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ip = AMDGPU_HW_IP_VCN_ENC;
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} else
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ip = AMDGPU_HW_IP_VCN_DEC;
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r = submit(len, ip);
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CU_ASSERT_EQUAL(r, 0);
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free_resource(&msg_buf);
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@ -646,10 +738,10 @@ static void amdgpu_cs_vcn_enc_create(void)
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unsigned width = 160, height = 128, buf_size;
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uint32_t fw_maj = 1, fw_min = 9;
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if (einfo.hw_ip_version_major == 2) {
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if (vcn_ip_version_major == 2) {
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fw_maj = 1;
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fw_min = 1;
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} else if (einfo.hw_ip_version_major == 3) {
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} else if (vcn_ip_version_major == 3) {
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fw_maj = 1;
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fw_min = 0;
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}
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@ -675,6 +767,10 @@ static void amdgpu_cs_vcn_enc_create(void)
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r = amdgpu_bo_cpu_unmap(cpb_buf.handle);
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len = 0;
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if (vcn_unified_ring)
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amdgpu_cs_sq_head(ib_cpu, &len, true);
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/* session info */
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st_offset = len;
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st_size = &ib_cpu[len++]; /* size */
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@ -733,7 +829,7 @@ static void amdgpu_cs_vcn_enc_create(void)
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ib_cpu[len++] = 1; /* quarter pel enabled */
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ib_cpu[len++] = 100; /* BASELINE profile */
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ib_cpu[len++] = 11; /* level */
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if (einfo.hw_ip_version_major == 3) {
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if (vcn_ip_version_major == 3) {
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ib_cpu[len++] = 0; /* b_picture_enabled */
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ib_cpu[len++] = 0; /* weighted_bipred_idc */
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}
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@ -774,7 +870,7 @@ static void amdgpu_cs_vcn_enc_create(void)
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ib_cpu[len++] = 0; /* scene change sensitivity */
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ib_cpu[len++] = 0; /* scene change min idr interval */
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ib_cpu[len++] = 0;
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if (einfo.hw_ip_version_major == 3)
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if (vcn_ip_version_major == 3)
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ib_cpu[len++] = 0;
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*st_size = (len - st_offset) * 4;
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@ -833,6 +929,9 @@ static void amdgpu_cs_vcn_enc_create(void)
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*p_task_size = (len - task_offset) * 4;
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if (vcn_unified_ring)
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amdgpu_cs_sq_ib_tail(ib_cpu + len);
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r = submit(len, AMDGPU_HW_IP_VCN_ENC);
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CU_ASSERT_EQUAL(r, 0);
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}
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@ -1176,10 +1275,10 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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uint32_t *st_size = NULL;
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uint32_t fw_maj = 1, fw_min = 9;
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if (einfo.hw_ip_version_major == 2) {
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if (vcn_ip_version_major == 2) {
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fw_maj = 1;
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fw_min = 1;
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} else if (einfo.hw_ip_version_major == 3) {
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} else if (vcn_ip_version_major == 3) {
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fw_maj = 1;
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fw_min = 0;
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}
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@ -1216,6 +1315,10 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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CU_ASSERT_EQUAL(r, 0);
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len = 0;
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if (vcn_unified_ring)
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amdgpu_cs_sq_head(ib_cpu, &len, true);
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/* session info */
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st_offset = len;
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st_size = &ib_cpu[len++]; /* size */
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@ -1240,7 +1343,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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/* sps */
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st_offset = len;
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st_size = &ib_cpu[len++]; /* size */
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if(einfo.hw_ip_version_major == 1)
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if(vcn_ip_version_major == 1)
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ib_cpu[len++] = 0x00000020; /* RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU vcn 1 */
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else
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ib_cpu[len++] = 0x0000000a; /* RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU vcn 2,3 */
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@ -1256,7 +1359,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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/* pps */
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st_offset = len;
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st_size = &ib_cpu[len++]; /* size */
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if(einfo.hw_ip_version_major == 1)
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if(vcn_ip_version_major == 1)
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ib_cpu[len++] = 0x00000020; /* RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU vcn 1*/
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else
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ib_cpu[len++] = 0x0000000a; /* RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU vcn 2,3*/
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@ -1270,7 +1373,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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/* slice header */
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st_offset = len;
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st_size = &ib_cpu[len++]; /* size */
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if(einfo.hw_ip_version_major == 1)
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if(vcn_ip_version_major == 1)
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ib_cpu[len++] = 0x0000000a; /* RENCODE_IB_PARAM_SLICE_HEADER vcn 1 */
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else
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ib_cpu[len++] = 0x0000000b; /* RENCODE_IB_PARAM_SLICE_HEADER vcn 2,3 */
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@ -1303,7 +1406,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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/* encode params */
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st_offset = len;
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st_size = &ib_cpu[len++]; /* size */
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if(einfo.hw_ip_version_major == 1)
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if(vcn_ip_version_major == 1)
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ib_cpu[len++] = 0x0000000b; /* RENCODE_IB_PARAM_ENCODE_PARAMS vcn 1*/
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else
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ib_cpu[len++] = 0x0000000f; /* RENCODE_IB_PARAM_ENCODE_PARAMS vcn 2,3*/
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@ -1324,7 +1427,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
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st_offset = len;
|
||||
st_size = &ib_cpu[len++]; /* size */
|
||||
ib_cpu[len++] = 0x00200003; /* RENCODE_H264_IB_PARAM_ENCODE_PARAMS */
|
||||
if (einfo.hw_ip_version_major != 3) {
|
||||
if (vcn_ip_version_major != 3) {
|
||||
ib_cpu[len++] = 0x00000000;
|
||||
ib_cpu[len++] = 0x00000000;
|
||||
ib_cpu[len++] = 0x00000000;
|
||||
|
|
@ -1353,7 +1456,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
|
|||
/* encode context */
|
||||
st_offset = len;
|
||||
st_size = &ib_cpu[len++]; /* size */
|
||||
if(einfo.hw_ip_version_major == 1)
|
||||
if(vcn_ip_version_major == 1)
|
||||
ib_cpu[len++] = 0x0000000d; /* ENCODE_CONTEXT_BUFFER vcn 1 */
|
||||
else
|
||||
ib_cpu[len++] = 0x00000011; /* ENCODE_CONTEXT_BUFFER vcn 2,3 */
|
||||
|
|
@ -1375,7 +1478,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
|
|||
/* bitstream buffer */
|
||||
st_offset = len;
|
||||
st_size = &ib_cpu[len++]; /* size */
|
||||
if(einfo.hw_ip_version_major == 1)
|
||||
if(vcn_ip_version_major == 1)
|
||||
ib_cpu[len++] = 0x0000000e; /* VIDEO_BITSTREAM_BUFFER vcn 1 */
|
||||
else
|
||||
ib_cpu[len++] = 0x00000012; /* VIDEO_BITSTREAM_BUFFER vcn 2,3 */
|
||||
|
|
@ -1389,7 +1492,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
|
|||
/* feedback */
|
||||
st_offset = len;
|
||||
st_size = &ib_cpu[len++]; /* size */
|
||||
if(einfo.hw_ip_version_major == 1)
|
||||
if(vcn_ip_version_major == 1)
|
||||
ib_cpu[len++] = 0x00000010; /* FEEDBACK_BUFFER vcn 1 */
|
||||
else
|
||||
ib_cpu[len++] = 0x00000015; /* FEEDBACK_BUFFER vcn 2,3 */
|
||||
|
|
@ -1403,7 +1506,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
|
|||
/* intra refresh */
|
||||
st_offset = len;
|
||||
st_size = &ib_cpu[len++];
|
||||
if(einfo.hw_ip_version_major == 1)
|
||||
if(vcn_ip_version_major == 1)
|
||||
ib_cpu[len++] = 0x0000000c; /* INTRA_REFRESH vcn 1 */
|
||||
else
|
||||
ib_cpu[len++] = 0x00000010; /* INTRA_REFRESH vcn 2,3 */
|
||||
|
|
@ -1412,7 +1515,7 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
|
|||
ib_cpu[len++] = 0x00000000;
|
||||
*st_size = (len - st_offset) * 4;
|
||||
|
||||
if(einfo.hw_ip_version_major != 1) {
|
||||
if(vcn_ip_version_major != 1) {
|
||||
/* Input Format */
|
||||
st_offset = len;
|
||||
st_size = &ib_cpu[len++];
|
||||
|
|
@ -1449,6 +1552,10 @@ static void amdgpu_cs_vcn_enc_encode_frame(int frame_type)
|
|||
*st_size = (len - st_offset) * 4;
|
||||
|
||||
*p_task_size = (len - task_offset) * 4;
|
||||
|
||||
if (vcn_unified_ring)
|
||||
amdgpu_cs_sq_ib_tail(ib_cpu + len);
|
||||
|
||||
r = submit(len, AMDGPU_HW_IP_VCN_ENC);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
|
|
@ -1473,10 +1580,10 @@ static void amdgpu_cs_vcn_enc_destroy(void)
|
|||
uint32_t *st_size = NULL;
|
||||
uint32_t fw_maj = 1, fw_min = 9;
|
||||
|
||||
if (einfo.hw_ip_version_major == 2) {
|
||||
if (vcn_ip_version_major == 2) {
|
||||
fw_maj = 1;
|
||||
fw_min = 1;
|
||||
} else if (einfo.hw_ip_version_major == 3) {
|
||||
} else if (vcn_ip_version_major == 3) {
|
||||
fw_maj = 1;
|
||||
fw_min = 0;
|
||||
}
|
||||
|
|
@ -1486,6 +1593,9 @@ static void amdgpu_cs_vcn_enc_destroy(void)
|
|||
resources[num_resources++] = enc_buf.handle;
|
||||
resources[num_resources++] = ib_handle;
|
||||
|
||||
if (vcn_unified_ring)
|
||||
amdgpu_cs_sq_head(ib_cpu, &len, true);
|
||||
|
||||
/* session info */
|
||||
st_offset = len;
|
||||
st_size = &ib_cpu[len++]; /* size */
|
||||
|
|
@ -1514,6 +1624,9 @@ static void amdgpu_cs_vcn_enc_destroy(void)
|
|||
|
||||
*p_task_size = (len - task_offset) * 4;
|
||||
|
||||
if (vcn_unified_ring)
|
||||
amdgpu_cs_sq_ib_tail(ib_cpu + len);
|
||||
|
||||
r = submit(len, AMDGPU_HW_IP_VCN_ENC);
|
||||
CU_ASSERT_EQUAL(r, 0);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue