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freedreno: sync uapi header (driver version 1.3.0) 

Signed-off-by: Rob Clark <robclark@freedesktop.org>
main
Rob Clark 2017-08-23 15:00:12 -04:00
parent 2fe4c07b38
commit 62e0767b81
1 changed files with 34 additions and 6 deletions
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40
freedreno/msm/msm_drm.h
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@ -73,6 +73,8 @@ struct drm_msm_timespec {
#define MSM_PARAM_CHIP_ID 0x03 #define MSM_PARAM_CHIP_ID 0x03
#define MSM_PARAM_MAX_FREQ 0x04 #define MSM_PARAM_MAX_FREQ 0x04
#define MSM_PARAM_TIMESTAMP 0x05 #define MSM_PARAM_TIMESTAMP 0x05
#define MSM_PARAM_GMEM_BASE 0x06
#define MSM_PARAM_NR_RINGS 0x07
struct drm_msm_param { struct drm_msm_param {
__u32 pipe; /* in, MSM_PIPE_x */ __u32 pipe; /* in, MSM_PIPE_x */
@ -104,10 +106,14 @@ struct drm_msm_gem_new {
__u32 handle; /* out */ __u32 handle; /* out */
}; };
#define MSM_INFO_IOVA 0x01
#define MSM_INFO_FLAGS (MSM_INFO_IOVA)
struct drm_msm_gem_info { struct drm_msm_gem_info {
__u32 handle; /* in */ __u32 handle; /* in */
__u32 pad; __u32 flags; /* in - combination of MSM_INFO_* flags */
__u64 offset; /* out, offset to pass to mmap() */ __u64 offset; /* out, mmap() offset or iova */
}; };
#define MSM_PREP_READ 0x01 #define MSM_PREP_READ 0x01
@ -167,7 +173,7 @@ struct drm_msm_gem_submit_cmd {
__u32 size; /* in, cmdstream size */ __u32 size; /* in, cmdstream size */
__u32 pad; __u32 pad;
__u32 nr_relocs; /* in, number of submit_reloc's */ __u32 nr_relocs; /* in, number of submit_reloc's */
__u64 __user relocs; /* in, ptr to array of submit_reloc's */ __u64 relocs; /* in, ptr to array of submit_reloc's */
}; };
/* Each buffer referenced elsewhere in the cmdstream submit (ie. the /* Each buffer referenced elsewhere in the cmdstream submit (ie. the
@ -211,9 +217,10 @@ struct drm_msm_gem_submit {
__u32 fence; /* out */ __u32 fence; /* out */
__u32 nr_bos; /* in, number of submit_bo's */ __u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_cmds; /* in, number of submit_cmd's */ __u32 nr_cmds; /* in, number of submit_cmd's */
__u64 __user bos; /* in, ptr to array of submit_bo's */ __u64 bos; /* in, ptr to array of submit_bo's */
__u64 __user cmds; /* in, ptr to array of submit_cmd's */ __u64 cmds; /* in, ptr to array of submit_cmd's */
__s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */ __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */
__u32 queueid; /* in, submitqueue id */
}; };
/* The normal way to synchronize with the GPU is just to CPU_PREP on /* The normal way to synchronize with the GPU is just to CPU_PREP on
@ -227,6 +234,7 @@ struct drm_msm_wait_fence {
__u32 fence; /* in */ __u32 fence; /* in */
__u32 pad; __u32 pad;
struct drm_msm_timespec timeout; /* in */ struct drm_msm_timespec timeout; /* in */
__u32 queueid; /* in, submitqueue id */
}; };
/* madvise provides a way to tell the kernel in case a buffers contents /* madvise provides a way to tell the kernel in case a buffers contents
@ -250,6 +258,20 @@ struct drm_msm_gem_madvise {
__u32 retained; /* out, whether backing store still exists */ __u32 retained; /* out, whether backing store still exists */
}; };
/*
* Draw queues allow the user to set specific submission parameter. Command
* submissions specify a specific submitqueue to use. ID 0 is reserved for
* backwards compatibility as a "default" submitqueue
*/
#define MSM_SUBMITQUEUE_FLAGS (0)
struct drm_msm_submitqueue {
__u32 flags; /* in, MSM_SUBMITQUEUE_x */
__u32 prio; /* in, Priority level */
__u32 id; /* out, identifier */
};
#define DRM_MSM_GET_PARAM 0x00 #define DRM_MSM_GET_PARAM 0x00
/* placeholder: /* placeholder:
#define DRM_MSM_SET_PARAM 0x01 #define DRM_MSM_SET_PARAM 0x01
@ -261,7 +283,11 @@ struct drm_msm_gem_madvise {
#define DRM_MSM_GEM_SUBMIT 0x06 #define DRM_MSM_GEM_SUBMIT 0x06
#define DRM_MSM_WAIT_FENCE 0x07 #define DRM_MSM_WAIT_FENCE 0x07
#define DRM_MSM_GEM_MADVISE 0x08 #define DRM_MSM_GEM_MADVISE 0x08
#define DRM_MSM_NUM_IOCTLS 0x09 /* placeholder:
#define DRM_MSM_GEM_SVM_NEW 0x09
*/
#define DRM_MSM_SUBMITQUEUE_NEW 0x0A
#define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param) #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new) #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
@ -271,6 +297,8 @@ struct drm_msm_gem_madvise {
#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit) #define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence) #define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
#define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise) #define DRM_IOCTL_MSM_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_MADVISE, struct drm_msm_gem_madvise)
#define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
#define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
#if defined(__cplusplus) #if defined(__cplusplus)
} }