Correct a LOR issue on FreeBSD by allocating temporary space and doing a
single DRM_COPY_FROM_USER rather than DRM_VERIFYAREA_READ followed by tons of DRM_COPY_FROM_USER_UNCHECKED. I don't like the look of the temporary space allocation, but I like the simplification in the rest of the file. Tested with glxgears, tuxracer, and q3 on a savage4.main
parent
c7af46cf7d
commit
6481a2e4cd
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@ -189,7 +189,7 @@ typedef struct drm_savage_private {
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/* Err, there is a macro wait_event in include/linux/wait.h.
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* Avoid unwanted macro expansion. */
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void (*emit_clip_rect)(struct drm_savage_private *dev_priv,
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drm_clip_rect_t *pbox);
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const drm_clip_rect_t *pbox);
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void (*dma_flush)(struct drm_savage_private *dev_priv);
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} drm_savage_private_t;
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@ -214,9 +214,9 @@ extern void savage_reclaim_buffers(drm_device_t *dev, DRMFILE filp);
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/* state functions */
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extern void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
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drm_clip_rect_t *pbox);
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const drm_clip_rect_t *pbox);
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extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
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drm_clip_rect_t *pbox);
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const drm_clip_rect_t *pbox);
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#define SAVAGE_FB_SIZE_S3 0x01000000 /* 16MB */
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#define SAVAGE_FB_SIZE_S4 0x02000000 /* 32MB */
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@ -499,15 +499,6 @@ extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
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#define BCI_WRITE( val ) *bci_ptr++ = (uint32_t)(val)
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#define BCI_COPY_FROM_USER(src,n) do { \
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unsigned int i; \
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for (i = 0; i < n; ++i) { \
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uint32_t val; \
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DRM_GET_USER_UNCHECKED(val, &((uint32_t*)(src))[i]); \
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BCI_WRITE(val); \
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} \
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} while(0)
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/*
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* command DMA support
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*/
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@ -533,8 +524,8 @@ extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
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#define DMA_WRITE( val ) *dma_ptr++ = (uint32_t)(val)
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#define DMA_COPY_FROM_USER(src,n) do { \
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DRM_COPY_FROM_USER_UNCHECKED(dma_ptr, (src), (n)*4); \
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#define DMA_COPY(src, n) do { \
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memcpy(dma_ptr, (src), (n)*4); \
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dma_ptr += n; \
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} while(0)
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@ -27,7 +27,7 @@
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#include "savage_drv.h"
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void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
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drm_clip_rect_t *pbox)
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const drm_clip_rect_t *pbox)
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{
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uint32_t scstart = dev_priv->state.s3d.new_scstart;
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uint32_t scend = dev_priv->state.s3d.new_scend;
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@ -53,7 +53,7 @@ void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
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}
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void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
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drm_clip_rect_t *pbox)
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const drm_clip_rect_t *pbox)
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{
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uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0;
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uint32_t drawctrl1 = dev_priv->state.s4.new_drawctrl1;
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@ -113,18 +113,18 @@ static int savage_verify_texaddr(drm_savage_private_t *dev_priv, int unit,
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#define SAVE_STATE(reg,where) \
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if(start <= reg && start+count > reg) \
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DRM_GET_USER_UNCHECKED(dev_priv->state.where, ®s[reg-start])
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dev_priv->state.where = regs[reg - start]
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#define SAVE_STATE_MASK(reg,where,mask) do { \
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if(start <= reg && start+count > reg) { \
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uint32_t tmp; \
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DRM_GET_USER_UNCHECKED(tmp, ®s[reg-start]); \
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tmp = regs[reg - start]; \
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dev_priv->state.where = (tmp & (mask)) | \
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(dev_priv->state.where & ~(mask)); \
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} \
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} while (0)
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static int savage_verify_state_s3d(drm_savage_private_t *dev_priv,
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unsigned int start, unsigned int count,
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const uint32_t __user *regs)
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const uint32_t *regs)
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{
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if (start < SAVAGE_TEXPALADDR_S3D ||
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start+count-1 > SAVAGE_DESTTEXRWWATERMARK_S3D) {
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@ -154,7 +154,7 @@ static int savage_verify_state_s3d(drm_savage_private_t *dev_priv,
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static int savage_verify_state_s4(drm_savage_private_t *dev_priv,
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unsigned int start, unsigned int count,
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const uint32_t __user *regs)
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const uint32_t *regs)
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{
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int ret = 0;
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@ -192,7 +192,7 @@ static int savage_verify_state_s4(drm_savage_private_t *dev_priv,
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static int savage_dispatch_state(drm_savage_private_t *dev_priv,
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const drm_savage_cmd_header_t *cmd_header,
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const uint32_t __user *regs)
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const uint32_t *regs)
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{
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unsigned int count = cmd_header->state.count;
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unsigned int start = cmd_header->state.start;
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@ -204,9 +204,6 @@ static int savage_dispatch_state(drm_savage_private_t *dev_priv,
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if (!count)
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return 0;
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if (DRM_VERIFYAREA_READ(regs, count*4))
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return DRM_ERR(EFAULT);
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if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
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ret = savage_verify_state_s3d(dev_priv, start, count, regs);
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if (ret != 0)
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@ -257,7 +254,7 @@ static int savage_dispatch_state(drm_savage_private_t *dev_priv,
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while (count > 0) {
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unsigned int n = count < 255 ? count : 255;
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DMA_SET_REGISTERS(start, n);
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DMA_COPY_FROM_USER(regs, n);
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DMA_COPY(regs, n);
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count -= n;
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start += n;
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regs += n;
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@ -415,8 +412,7 @@ static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
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static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
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const drm_savage_cmd_header_t *cmd_header,
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const uint32_t __user *vtxbuf,
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unsigned int vb_size,
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const uint32_t *vtxbuf, unsigned int vb_size,
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unsigned int vb_stride)
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{
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unsigned char reorder = 0;
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@ -501,8 +497,7 @@ static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
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for (i = start; i < start+count; ++i) {
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unsigned int j = i + reorder[i % 3];
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DMA_COPY_FROM_USER(&vtxbuf[vb_stride*j],
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vtx_size);
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DMA_COPY(&vtxbuf[vb_stride*j], vtx_size);
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}
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DMA_COMMIT();
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@ -511,13 +506,12 @@ static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
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DMA_DRAW_PRIMITIVE(count, prim, skip);
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if (vb_stride == vtx_size) {
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DMA_COPY_FROM_USER(&vtxbuf[vb_stride*start],
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vtx_size*count);
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DMA_COPY(&vtxbuf[vb_stride*start],
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vtx_size*count);
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} else {
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for (i = start; i < start+count; ++i) {
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DMA_COPY_FROM_USER(
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&vtxbuf[vb_stride*i],
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vtx_size);
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DMA_COPY(&vtxbuf[vb_stride*i],
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vtx_size);
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}
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}
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@ -535,7 +529,7 @@ static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
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static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
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const drm_savage_cmd_header_t *cmd_header,
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const uint16_t __user *usr_idx,
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const uint16_t *idx,
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const drm_buf_t *dmabuf)
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{
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unsigned char reorder = 0;
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@ -625,11 +619,8 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
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while (n != 0) {
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/* Can emit up to 255 indices (85 triangles) at once. */
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unsigned int count = n > 255 ? 255 : n;
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/* Is it ok to allocate 510 bytes on the stack in an ioctl? */
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uint16_t idx[255];
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/* Copy and check indices */
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DRM_COPY_FROM_USER_UNCHECKED(idx, usr_idx, count*2);
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/* check indices */
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for (i = 0; i < count; ++i) {
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if (idx[i] > dmabuf->total/32) {
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DRM_ERROR("idx[%u]=%u out of range (0-%u)\n",
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@ -670,7 +661,7 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
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BCI_WRITE(idx[i]);
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}
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usr_idx += count;
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idx += count;
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n -= count;
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prim |= BCI_CMD_DRAW_CONT;
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@ -681,8 +672,8 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
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static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
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const drm_savage_cmd_header_t *cmd_header,
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const uint16_t __user *usr_idx,
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const uint32_t __user *vtxbuf,
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const uint16_t *idx,
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const uint32_t *vtxbuf,
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unsigned int vb_size,
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unsigned int vb_stride)
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{
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while (n != 0) {
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/* Can emit up to 255 vertices (85 triangles) at once. */
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unsigned int count = n > 255 ? 255 : n;
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/* Is it ok to allocate 510 bytes on the stack in an ioctl? */
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uint16_t idx[255];
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/* Copy and check indices */
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DRM_COPY_FROM_USER_UNCHECKED(idx, usr_idx, count*2);
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/* Check indices */
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for (i = 0; i < count; ++i) {
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if (idx[i] > vb_size / (vb_stride*4)) {
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DRM_ERROR("idx[%u]=%u out of range (0-%u)\n",
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for (i = 0; i < count; ++i) {
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unsigned int j = idx[i + reorder[i % 3]];
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DMA_COPY_FROM_USER(&vtxbuf[vb_stride*j],
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vtx_size);
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DMA_COPY(&vtxbuf[vb_stride*j], vtx_size);
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}
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DMA_COMMIT();
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for (i = 0; i < count; ++i) {
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unsigned int j = idx[i];
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DMA_COPY_FROM_USER(&vtxbuf[vb_stride*j],
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vtx_size);
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DMA_COPY(&vtxbuf[vb_stride*j], vtx_size);
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}
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DMA_COMMIT();
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}
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usr_idx += count;
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idx += count;
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n -= count;
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prim |= BCI_CMD_DRAW_CONT;
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@ -802,11 +788,11 @@ static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
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static int savage_dispatch_clear(drm_savage_private_t *dev_priv,
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const drm_savage_cmd_header_t *cmd_header,
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const drm_savage_cmd_header_t __user *data,
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const drm_savage_cmd_header_t *data,
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unsigned int nbox,
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const drm_clip_rect_t __user *usr_boxes)
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const drm_clip_rect_t *boxes)
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{
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unsigned int flags = cmd_header->clear0.flags, mask, value;
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unsigned int flags = cmd_header->clear0.flags;
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unsigned int clear_cmd;
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unsigned int i, nbufs;
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DMA_LOCALS;
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if (nbox == 0)
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return 0;
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DRM_GET_USER_UNCHECKED(mask, &((const drm_savage_cmd_header_t*)data)
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->clear1.mask);
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DRM_GET_USER_UNCHECKED(value, &((const drm_savage_cmd_header_t*)data)
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->clear1.value);
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clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
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BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW;
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BCI_CMD_SET_ROP(clear_cmd,0xCC);
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if (nbufs == 0)
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return 0;
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if (mask != 0xffffffff) {
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if (data->clear1.mask != 0xffffffff) {
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/* set mask */
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BEGIN_DMA(2);
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DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);
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DMA_WRITE(mask);
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DMA_WRITE(data->clear1.mask);
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DMA_COMMIT();
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}
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for (i = 0; i < nbox; ++i) {
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drm_clip_rect_t box;
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unsigned int x, y, w, h;
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unsigned int buf;
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DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));
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x = box.x1, y = box.y1;
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w = box.x2 - box.x1;
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h = box.y2 - box.y1;
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x = boxes[i].x1, y = boxes[i].y1;
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w = boxes[i].x2 - boxes[i].x1;
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h = boxes[i].y2 - boxes[i].y1;
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BEGIN_DMA(nbufs*6);
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for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) {
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if (!(flags & buf))
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DMA_WRITE(dev_priv->depth_bd);
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break;
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}
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DMA_WRITE(value);
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DMA_WRITE(data->clear1.value);
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DMA_WRITE(BCI_X_Y(x, y));
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DMA_WRITE(BCI_W_H(w, h));
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}
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DMA_COMMIT();
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}
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if (mask != 0xffffffff) {
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if (data->clear1.mask != 0xffffffff) {
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/* reset mask */
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BEGIN_DMA(2);
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DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);
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}
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static int savage_dispatch_swap(drm_savage_private_t *dev_priv,
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unsigned int nbox,
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const drm_clip_rect_t __user *usr_boxes)
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unsigned int nbox, const drm_clip_rect_t *boxes)
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{
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unsigned int swap_cmd;
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unsigned int i;
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BCI_CMD_SET_ROP(swap_cmd,0xCC);
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for (i = 0; i < nbox; ++i) {
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drm_clip_rect_t box;
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DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));
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BEGIN_DMA(6);
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DMA_WRITE(swap_cmd);
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DMA_WRITE(dev_priv->back_offset);
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DMA_WRITE(dev_priv->back_bd);
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DMA_WRITE(BCI_X_Y(box.x1, box.y1));
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DMA_WRITE(BCI_X_Y(box.x1, box.y1));
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DMA_WRITE(BCI_W_H(box.x2-box.x1, box.y2-box.y1));
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DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1));
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DMA_WRITE(BCI_X_Y(boxes[i].x1, boxes[i].y1));
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DMA_WRITE(BCI_W_H(boxes[i].x2-boxes[i].x1,
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boxes[i].y2-boxes[i].y1));
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DMA_COMMIT();
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}
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@ -913,29 +890,26 @@ static int savage_dispatch_swap(drm_savage_private_t *dev_priv,
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}
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static int savage_dispatch_draw(drm_savage_private_t *dev_priv,
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const drm_savage_cmd_header_t __user *start,
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const drm_savage_cmd_header_t __user *end,
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const drm_savage_cmd_header_t *start,
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const drm_savage_cmd_header_t *end,
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const drm_buf_t *dmabuf,
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const unsigned int __user *usr_vtxbuf,
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const unsigned int *vtxbuf,
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unsigned int vb_size, unsigned int vb_stride,
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unsigned int nbox,
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const drm_clip_rect_t __user *usr_boxes)
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const drm_clip_rect_t *boxes)
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{
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unsigned int i, j;
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int ret;
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for (i = 0; i < nbox; ++i) {
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drm_clip_rect_t box;
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const drm_savage_cmd_header_t __user *usr_cmdbuf;
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DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));
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dev_priv->emit_clip_rect(dev_priv, &box);
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const drm_savage_cmd_header_t *cmdbuf;
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dev_priv->emit_clip_rect(dev_priv, &boxes[i]);
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usr_cmdbuf = start;
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while (usr_cmdbuf < end) {
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cmdbuf = start;
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while (cmdbuf < end) {
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drm_savage_cmd_header_t cmd_header;
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DRM_COPY_FROM_USER_UNCHECKED(&cmd_header, usr_cmdbuf,
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sizeof(cmd_header));
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usr_cmdbuf++;
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cmd_header = *cmdbuf;
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cmdbuf++;
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switch (cmd_header.cmd.cmd) {
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case SAVAGE_CMD_DMA_PRIM:
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ret = savage_dispatch_dma_prim(
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||||
|
@ -944,27 +918,24 @@ static int savage_dispatch_draw(drm_savage_private_t *dev_priv,
|
|||
case SAVAGE_CMD_VB_PRIM:
|
||||
ret = savage_dispatch_vb_prim(
|
||||
dev_priv, &cmd_header,
|
||||
(const uint32_t __user *)usr_vtxbuf,
|
||||
vb_size, vb_stride);
|
||||
vtxbuf, vb_size, vb_stride);
|
||||
break;
|
||||
case SAVAGE_CMD_DMA_IDX:
|
||||
j = (cmd_header.idx.count + 3) / 4;
|
||||
/* j was check in savage_bci_cmdbuf */
|
||||
ret = savage_dispatch_dma_idx(
|
||||
dev_priv, &cmd_header,
|
||||
(const uint16_t __user *)usr_cmdbuf,
|
||||
ret = savage_dispatch_dma_idx(dev_priv,
|
||||
&cmd_header, (const uint16_t *)cmdbuf,
|
||||
dmabuf);
|
||||
usr_cmdbuf += j;
|
||||
cmdbuf += j;
|
||||
break;
|
||||
case SAVAGE_CMD_VB_IDX:
|
||||
j = (cmd_header.idx.count + 3) / 4;
|
||||
/* j was check in savage_bci_cmdbuf */
|
||||
ret = savage_dispatch_vb_idx(
|
||||
dev_priv, &cmd_header,
|
||||
(const uint16_t __user *)usr_cmdbuf,
|
||||
(const uint32_t __user *)usr_vtxbuf,
|
||||
vb_size, vb_stride);
|
||||
usr_cmdbuf += j;
|
||||
ret = savage_dispatch_vb_idx(dev_priv,
|
||||
&cmd_header, (const uint16_t *)cmdbuf,
|
||||
(const uint32_t *)vtxbuf, vb_size,
|
||||
vb_stride);
|
||||
cmdbuf += j;
|
||||
break;
|
||||
default:
|
||||
/* What's the best return code? EFAULT? */
|
||||
|
@ -989,10 +960,10 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
drm_device_dma_t *dma = dev->dma;
|
||||
drm_buf_t *dmabuf;
|
||||
drm_savage_cmdbuf_t cmdbuf;
|
||||
drm_savage_cmd_header_t __user *usr_cmdbuf;
|
||||
drm_savage_cmd_header_t __user *first_draw_cmd;
|
||||
unsigned int __user *usr_vtxbuf;
|
||||
drm_clip_rect_t __user *usr_boxes;
|
||||
drm_savage_cmd_header_t *kcmd_addr = NULL;
|
||||
drm_savage_cmd_header_t *first_draw_cmd;
|
||||
unsigned int *kvb_addr = NULL;
|
||||
drm_clip_rect_t *kbox_addr = NULL;
|
||||
unsigned int i, j;
|
||||
int ret = 0;
|
||||
|
||||
|
@ -1014,15 +985,53 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
dmabuf = NULL;
|
||||
}
|
||||
|
||||
usr_cmdbuf = (drm_savage_cmd_header_t __user *)cmdbuf.cmd_addr;
|
||||
usr_vtxbuf = (unsigned int __user *)cmdbuf.vb_addr;
|
||||
usr_boxes = (drm_clip_rect_t __user *)cmdbuf.box_addr;
|
||||
if ((cmdbuf.size && DRM_VERIFYAREA_READ(usr_cmdbuf, cmdbuf.size*8)) ||
|
||||
(cmdbuf.vb_size && DRM_VERIFYAREA_READ(
|
||||
usr_vtxbuf, cmdbuf.vb_size)) ||
|
||||
(cmdbuf.nbox && DRM_VERIFYAREA_READ(
|
||||
usr_boxes, cmdbuf.nbox*sizeof(drm_clip_rect_t))))
|
||||
return DRM_ERR(EFAULT);
|
||||
/* Copy the user buffers into kernel temporary areas. This hasn't been
|
||||
* a performance loss compared to VERIFYAREA_READ/
|
||||
* COPY_FROM_USER_UNCHECKED when done in other drivers, and is correct
|
||||
* for locking on FreeBSD.
|
||||
*/
|
||||
if (cmdbuf.size) {
|
||||
kcmd_addr = drm_alloc(cmdbuf.size * 8, DRM_MEM_DRIVER);
|
||||
if (kcmd_addr == NULL)
|
||||
return ENOMEM;
|
||||
|
||||
if (DRM_COPY_FROM_USER(kcmd_addr, cmdbuf.cmd_addr,
|
||||
cmdbuf.size * 8))
|
||||
{
|
||||
drm_free(kcmd_addr, cmdbuf.size * 8, DRM_MEM_DRIVER);
|
||||
return DRM_ERR(EFAULT);
|
||||
}
|
||||
cmdbuf.cmd_addr = kcmd_addr;
|
||||
}
|
||||
if (cmdbuf.vb_size) {
|
||||
kvb_addr = drm_alloc(cmdbuf.vb_size, DRM_MEM_DRIVER);
|
||||
if (kvb_addr == NULL) {
|
||||
ret = DRM_ERR(ENOMEM);
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (DRM_COPY_FROM_USER(kvb_addr, cmdbuf.vb_addr,
|
||||
cmdbuf.vb_size)) {
|
||||
ret = DRM_ERR(EFAULT);
|
||||
goto done;
|
||||
}
|
||||
cmdbuf.vb_addr = kvb_addr;
|
||||
}
|
||||
if (cmdbuf.nbox) {
|
||||
kbox_addr = drm_alloc(cmdbuf.nbox * sizeof(drm_clip_rect_t),
|
||||
DRM_MEM_DRIVER);
|
||||
if (kbox_addr == NULL) {
|
||||
ret = DRM_ERR(ENOMEM);
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (DRM_COPY_FROM_USER(kbox_addr, cmdbuf.box_addr,
|
||||
cmdbuf.nbox * sizeof(drm_clip_rect_t))) {
|
||||
ret = DRM_ERR(EFAULT);
|
||||
goto done;
|
||||
}
|
||||
cmdbuf.box_addr = kbox_addr;
|
||||
}
|
||||
|
||||
/* Make sure writes to DMA buffers are finished before sending
|
||||
* DMA commands to the graphics hardware. */
|
||||
|
@ -1036,9 +1045,8 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
first_draw_cmd = NULL;
|
||||
while (i < cmdbuf.size) {
|
||||
drm_savage_cmd_header_t cmd_header;
|
||||
DRM_COPY_FROM_USER_UNCHECKED(&cmd_header, usr_cmdbuf,
|
||||
sizeof(cmd_header));
|
||||
usr_cmdbuf++;
|
||||
cmd_header = *(drm_savage_cmd_header_t *)cmdbuf.cmd_addr;
|
||||
cmdbuf.cmd_addr++;
|
||||
i++;
|
||||
|
||||
/* Group drawing commands with same state to minimize
|
||||
|
@ -1058,17 +1066,18 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
case SAVAGE_CMD_DMA_PRIM:
|
||||
case SAVAGE_CMD_VB_PRIM:
|
||||
if (!first_draw_cmd)
|
||||
first_draw_cmd = usr_cmdbuf-1;
|
||||
usr_cmdbuf += j;
|
||||
first_draw_cmd = cmdbuf.cmd_addr-1;
|
||||
cmdbuf.cmd_addr += j;
|
||||
i += j;
|
||||
break;
|
||||
default:
|
||||
if (first_draw_cmd) {
|
||||
ret = savage_dispatch_draw (
|
||||
dev_priv, first_draw_cmd, usr_cmdbuf-1,
|
||||
dmabuf, usr_vtxbuf, cmdbuf.vb_size,
|
||||
dev_priv, first_draw_cmd,
|
||||
cmdbuf.cmd_addr-1,
|
||||
dmabuf, cmdbuf.vb_addr, cmdbuf.vb_size,
|
||||
cmdbuf.vb_stride,
|
||||
cmdbuf.nbox, usr_boxes);
|
||||
cmdbuf.nbox, cmdbuf.box_addr);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
first_draw_cmd = NULL;
|
||||
|
@ -1084,12 +1093,12 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
DRM_ERROR("command SAVAGE_CMD_STATE extends "
|
||||
"beyond end of command buffer\n");
|
||||
DMA_FLUSH();
|
||||
return DRM_ERR(EINVAL);
|
||||
ret = DRM_ERR(EINVAL);
|
||||
goto done;
|
||||
}
|
||||
ret = savage_dispatch_state(
|
||||
dev_priv, &cmd_header,
|
||||
(uint32_t __user *)usr_cmdbuf);
|
||||
usr_cmdbuf += j;
|
||||
ret = savage_dispatch_state(dev_priv, &cmd_header,
|
||||
(const uint32_t *)cmdbuf.cmd_addr);
|
||||
cmdbuf.cmd_addr += j;
|
||||
i += j;
|
||||
break;
|
||||
case SAVAGE_CMD_CLEAR:
|
||||
|
@ -1097,38 +1106,40 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
DRM_ERROR("command SAVAGE_CMD_CLEAR extends "
|
||||
"beyond end of command buffer\n");
|
||||
DMA_FLUSH();
|
||||
return DRM_ERR(EINVAL);
|
||||
ret = DRM_ERR(EINVAL);
|
||||
goto done;
|
||||
}
|
||||
ret = savage_dispatch_clear(dev_priv, &cmd_header,
|
||||
usr_cmdbuf,
|
||||
cmdbuf.nbox, usr_boxes);
|
||||
usr_cmdbuf++;
|
||||
cmdbuf.cmd_addr,
|
||||
cmdbuf.nbox, cmdbuf.box_addr);
|
||||
cmdbuf.cmd_addr++;
|
||||
i++;
|
||||
break;
|
||||
case SAVAGE_CMD_SWAP:
|
||||
ret = savage_dispatch_swap(dev_priv,
|
||||
cmdbuf.nbox, usr_boxes);
|
||||
ret = savage_dispatch_swap(dev_priv, cmdbuf.nbox,
|
||||
cmdbuf.box_addr);
|
||||
break;
|
||||
default:
|
||||
DRM_ERROR("invalid command 0x%x\n", cmd_header.cmd.cmd);
|
||||
DMA_FLUSH();
|
||||
return DRM_ERR(EINVAL);
|
||||
ret = DRM_ERR(EINVAL);
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (ret != 0) {
|
||||
DMA_FLUSH();
|
||||
return ret;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
|
||||
if (first_draw_cmd) {
|
||||
ret = savage_dispatch_draw (
|
||||
dev_priv, first_draw_cmd, usr_cmdbuf, dmabuf,
|
||||
usr_vtxbuf, cmdbuf.vb_size, cmdbuf.vb_stride,
|
||||
cmdbuf.nbox, usr_boxes);
|
||||
dev_priv, first_draw_cmd, cmdbuf.cmd_addr, dmabuf,
|
||||
cmdbuf.vb_addr, cmdbuf.vb_size, cmdbuf.vb_stride,
|
||||
cmdbuf.nbox, cmdbuf.box_addr);
|
||||
if (ret != 0) {
|
||||
DMA_FLUSH();
|
||||
return ret;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1142,5 +1153,12 @@ int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
|
|||
savage_freelist_put(dev, dmabuf);
|
||||
}
|
||||
|
||||
return 0;
|
||||
done:
|
||||
/* If we didn't need to allocate them, these'll be NULL */
|
||||
drm_free(kcmd_addr, cmdbuf.size * 8, DRM_MEM_DRIVER);
|
||||
drm_free(kvb_addr, cmdbuf.vb_size, DRM_MEM_DRIVER);
|
||||
drm_free(kbox_addr, cmdbuf.nbox * sizeof(drm_clip_rect_t),
|
||||
DRM_MEM_DRIVER);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue