Eliminate several useless ioctls and associated cruft.

The ioctlss XGI_ESC_DEVICE_INFO, XGI_ESC_MEM_COLLECT,
XGI_ESC_PCIE_CHECK, XGI_ESC_GET_SCREEN_INFO, XGI_ESC_PUT_SCREEN_INFO,
XGI_ESC_MMIO_INFO, and XGI_ESC_SAREA_INFO, are completely unnecessary.
The will be doubly useless when the driver is converted to the DRM
infrastructure.
main
Ian Romanick 2007-07-16 20:58:43 -07:00
parent 4575d5b8f1
commit 658ff2daf3
6 changed files with 18 additions and 173 deletions

View File

@ -877,10 +877,6 @@ int xgi_kern_ioctl(struct inode *inode, struct file *filp,
arg_size);
switch (_IOC_NR(cmd)) {
case XGI_ESC_DEVICE_INFO:
XGI_INFO("Jong-xgi_ioctl_get_device_info \n");
xgi_get_device_info(info, (struct xgi_chip_info *)arg_copy);
break;
case XGI_ESC_POST_VBIOS:
XGI_INFO("Jong-xgi_ioctl_post_vbios \n");
break;
@ -892,10 +888,6 @@ int xgi_kern_ioctl(struct inode *inode, struct file *filp,
XGI_INFO("Jong-xgi_ioctl_fb_free \n");
xgi_fb_free(info, *(unsigned long *)arg_copy);
break;
case XGI_ESC_MEM_COLLECT:
XGI_INFO("Jong-xgi_ioctl_mem_collect \n");
xgi_mem_collect(info, (unsigned int *)arg_copy);
break;
case XGI_ESC_PCIE_ALLOC:
XGI_INFO("Jong-xgi_ioctl_pcie_alloc \n");
xgi_pcie_alloc(info, alloc, 0);
@ -905,30 +897,10 @@ int xgi_kern_ioctl(struct inode *inode, struct file *filp,
*((unsigned long *)arg_copy));
xgi_pcie_free(info, *((unsigned long *)arg_copy));
break;
case XGI_ESC_PCIE_CHECK:
XGI_INFO("Jong-xgi_pcie_heap_check \n");
xgi_pcie_heap_check();
break;
case XGI_ESC_GET_SCREEN_INFO:
XGI_INFO("Jong-xgi_get_screen_info \n");
xgi_get_screen_info(info, (struct xgi_screen_info *)arg_copy);
break;
case XGI_ESC_PUT_SCREEN_INFO:
XGI_INFO("Jong-xgi_put_screen_info \n");
xgi_put_screen_info(info, (struct xgi_screen_info *)arg_copy);
break;
case XGI_ESC_MMIO_INFO:
XGI_INFO("Jong-xgi_ioctl_get_mmio_info \n");
xgi_get_mmio_info(info, (struct xgi_mmio_info *)arg_copy);
break;
case XGI_ESC_GE_RESET:
XGI_INFO("Jong-xgi_ioctl_ge_reset \n");
xgi_ge_reset(info);
break;
case XGI_ESC_SAREA_INFO:
XGI_INFO("Jong-xgi_ioctl_sarea_info \n");
xgi_sarea_info(info, (struct xgi_sarea_info *)arg_copy);
break;
case XGI_ESC_DUMP_REGISTER:
XGI_INFO("Jong-xgi_ioctl_dump_register \n");
xgi_dump_register(info);

View File

@ -110,8 +110,6 @@ struct xgi_info {
struct xgi_aperture mmio;
struct xgi_aperture fb;
struct xgi_aperture pcie;
struct xgi_screen_info scrn_info;
struct xgi_sarea_info sarea_info;
/* look up table parameters */
u32 *lut_base;
@ -207,7 +205,6 @@ extern void xgi_pcie_heap_cleanup(struct xgi_info * info);
extern void xgi_pcie_alloc(struct xgi_info * info,
struct xgi_mem_alloc * alloc, pid_t pid);
extern void xgi_pcie_free(struct xgi_info * info, unsigned long offset);
extern void xgi_pcie_heap_check(void);
extern struct xgi_pcie_block *xgi_find_pcie_block(struct xgi_info * info,
unsigned long address);
extern void *xgi_find_pcie_virt(struct xgi_info * info, unsigned long address);

View File

@ -31,78 +31,12 @@
#include "xgi_regs.h"
#include "xgi_pcie.h"
void xgi_get_device_info(struct xgi_info * info, struct xgi_chip_info * req)
{
req->device_id = info->dev->device;
req->device_name[0] = 'x';
req->device_name[1] = 'g';
req->device_name[2] = '4';
req->device_name[3] = '7';
req->vendor_id = info->dev->vendor;
req->curr_display_mode = 0;
req->fb_size = info->fb.size;
req->sarea_bus_addr = info->sarea_info.bus_addr;
req->sarea_size = info->sarea_info.size;
}
void xgi_get_mmio_info(struct xgi_info * info, struct xgi_mmio_info * req)
{
req->mmio_base = info->mmio.base;
req->size = info->mmio.size;
}
void xgi_put_screen_info(struct xgi_info * info, struct xgi_screen_info * req)
{
info->scrn_info.scrn_start = req->scrn_start;
info->scrn_info.scrn_xres = req->scrn_xres;
info->scrn_info.scrn_yres = req->scrn_yres;
info->scrn_info.scrn_bpp = req->scrn_bpp;
info->scrn_info.scrn_pitch = req->scrn_pitch;
XGI_INFO("info->scrn_info.scrn_start: 0x%lx"
"info->scrn_info.scrn_xres: 0x%lx"
"info->scrn_info.scrn_yres: 0x%lx"
"info->scrn_info.scrn_bpp: 0x%lx"
"info->scrn_info.scrn_pitch: 0x%lx\n",
info->scrn_info.scrn_start,
info->scrn_info.scrn_xres,
info->scrn_info.scrn_yres,
info->scrn_info.scrn_bpp, info->scrn_info.scrn_pitch);
}
void xgi_get_screen_info(struct xgi_info * info, struct xgi_screen_info * req)
{
req->scrn_start = info->scrn_info.scrn_start;
req->scrn_xres = info->scrn_info.scrn_xres;
req->scrn_yres = info->scrn_info.scrn_yres;
req->scrn_bpp = info->scrn_info.scrn_bpp;
req->scrn_pitch = info->scrn_info.scrn_pitch;
XGI_INFO("req->scrn_start: 0x%lx"
"req->scrn_xres: 0x%lx"
"req->scrn_yres: 0x%lx"
"req->scrn_bpp: 0x%lx"
"req->scrn_pitch: 0x%lx\n",
req->scrn_start,
req->scrn_xres,
req->scrn_yres, req->scrn_bpp, req->scrn_pitch);
}
void xgi_ge_reset(struct xgi_info * info)
{
xgi_disable_ge(info);
xgi_enable_ge(info);
}
void xgi_sarea_info(struct xgi_info * info, struct xgi_sarea_info * req)
{
info->sarea_info.bus_addr = req->bus_addr;
info->sarea_info.size = req->size;
XGI_INFO("info->sarea_info.bus_addr: 0x%lx"
"info->sarea_info.size: 0x%lx\n",
info->sarea_info.bus_addr, info->sarea_info.size);
}
/*
* irq functions
*/

View File

@ -30,12 +30,7 @@
#define _XGI_MISC_H_
extern void xgi_dump_register(struct xgi_info * info);
extern void xgi_get_device_info(struct xgi_info * info, struct xgi_chip_info * req);
extern void xgi_get_mmio_info(struct xgi_info * info, struct xgi_mmio_info * req);
extern void xgi_get_screen_info(struct xgi_info * info, struct xgi_screen_info * req);
extern void xgi_put_screen_info(struct xgi_info * info, struct xgi_screen_info * req);
extern void xgi_ge_reset(struct xgi_info * info);
extern void xgi_sarea_info(struct xgi_info * info, struct xgi_sarea_info * req);
extern void xgi_restore_registers(struct xgi_info * info);
extern bool xgi_ge_irq_handler(struct xgi_info * info);

View File

@ -344,35 +344,6 @@ int xgi_pcie_heap_init(struct xgi_info * info)
return 0;
}
void xgi_pcie_heap_check(void)
{
#ifdef XGI_DEBUG
struct xgi_pcie_block *block;
unsigned int ownerIndex;
static const char *const ownerStr[6] =
{ "2D", "3D", "3D_CMD", "3D_SCR", "3D_TEX", "ELSE" };
if (!xgi_pcie_heap) {
return;
}
XGI_INFO("pcie freemax = 0x%lx\n", xgi_pcie_heap->max_freesize);
list_for_each_entry(block, &xgi_pcie_heap->used_list, list) {
if (block->owner == PCIE_2D)
ownerIndex = 0;
else if (block->owner > PCIE_3D_TEXTURE
|| block->owner < PCIE_2D
|| block->owner < PCIE_3D)
ownerIndex = 5;
else
ownerIndex = block->owner - PCIE_3D + 1;
XGI_INFO("Allocated by %s, block offset: 0x%lx, size: 0x%lx \n",
ownerStr[ownerIndex], block->offset, block->size);
}
#endif
}
void xgi_pcie_heap_cleanup(struct xgi_info * info)
{
struct list_head *free_list;

View File

@ -31,15 +31,17 @@
#include <linux/types.h>
#include <asm/ioctl.h>
struct xgi_chip_info {
struct drm_xgi_sarea {
__u16 device_id;
__u16 vendor_id;
char device_name[32];
unsigned int curr_display_mode; //Singe, DualView(Contained), MHS
unsigned int fb_size;
unsigned long sarea_bus_addr;
unsigned int sarea_size;
unsigned int scrn_start;
unsigned int scrn_xres;
unsigned int scrn_yres;
unsigned int scrn_bpp;
unsigned int scrn_pitch;
};
enum xgi_mem_location {
@ -65,14 +67,6 @@ struct xgi_mem_alloc {
unsigned long bus_addr;
};
struct xgi_screen_info {
unsigned int scrn_start;
unsigned int scrn_xres;
unsigned int scrn_yres;
unsigned int scrn_bpp;
unsigned int scrn_pitch;
};
struct xgi_sarea_info {
unsigned long bus_addr;
unsigned int size;
@ -114,53 +108,35 @@ struct xgi_mmio_info {
#define XGI_IOCTL_MAGIC 'x' /* use 'x' as magic number */
#define XGI_IOCTL_BASE 0
#define XGI_ESC_DEVICE_INFO (XGI_IOCTL_BASE + 0)
#define XGI_ESC_POST_VBIOS (XGI_IOCTL_BASE + 1)
#define XGI_ESC_POST_VBIOS (XGI_IOCTL_BASE + 0)
#define XGI_ESC_FB_INIT (XGI_IOCTL_BASE + 2)
#define XGI_ESC_FB_ALLOC (XGI_IOCTL_BASE + 3)
#define XGI_ESC_FB_FREE (XGI_IOCTL_BASE + 4)
#define XGI_ESC_PCIE_INIT (XGI_IOCTL_BASE + 5)
#define XGI_ESC_PCIE_ALLOC (XGI_IOCTL_BASE + 6)
#define XGI_ESC_PCIE_FREE (XGI_IOCTL_BASE + 7)
#define XGI_ESC_SUBMIT_CMDLIST (XGI_IOCTL_BASE + 8)
#define XGI_ESC_PUT_SCREEN_INFO (XGI_IOCTL_BASE + 9)
#define XGI_ESC_GET_SCREEN_INFO (XGI_IOCTL_BASE + 10)
#define XGI_ESC_GE_RESET (XGI_IOCTL_BASE + 11)
#define XGI_ESC_SAREA_INFO (XGI_IOCTL_BASE + 12)
#define XGI_ESC_DUMP_REGISTER (XGI_IOCTL_BASE + 13)
#define XGI_ESC_DEBUG_INFO (XGI_IOCTL_BASE + 14)
#define XGI_ESC_TEST_RWINKERNEL (XGI_IOCTL_BASE + 16)
#define XGI_ESC_STATE_CHANGE (XGI_IOCTL_BASE + 17)
#define XGI_ESC_MMIO_INFO (XGI_IOCTL_BASE + 18)
#define XGI_ESC_PCIE_CHECK (XGI_IOCTL_BASE + 19)
#define XGI_ESC_MEM_COLLECT (XGI_IOCTL_BASE + 20)
#define XGI_ESC_FB_ALLOC (XGI_IOCTL_BASE + 1)
#define XGI_ESC_FB_FREE (XGI_IOCTL_BASE + 2)
#define XGI_ESC_PCIE_ALLOC (XGI_IOCTL_BASE + 3)
#define XGI_ESC_PCIE_FREE (XGI_IOCTL_BASE + 4)
#define XGI_ESC_SUBMIT_CMDLIST (XGI_IOCTL_BASE + 5)
#define XGI_ESC_GE_RESET (XGI_IOCTL_BASE + 6)
#define XGI_ESC_DUMP_REGISTER (XGI_IOCTL_BASE + 7)
#define XGI_ESC_DEBUG_INFO (XGI_IOCTL_BASE + 8)
#define XGI_ESC_TEST_RWINKERNEL (XGI_IOCTL_BASE + 9)
#define XGI_ESC_STATE_CHANGE (XGI_IOCTL_BASE + 10)
#define XGI_IOCTL_DEVICE_INFO _IOR(XGI_IOCTL_MAGIC, XGI_ESC_DEVICE_INFO, struct xgi_chip_info)
#define XGI_IOCTL_POST_VBIOS _IO(XGI_IOCTL_MAGIC, XGI_ESC_POST_VBIOS)
#define XGI_IOCTL_FB_INIT _IO(XGI_IOCTL_MAGIC, XGI_ESC_FB_INIT)
#define XGI_IOCTL_FB_ALLOC _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_FB_ALLOC, struct xgi_mem_alloc)
#define XGI_IOCTL_FB_FREE _IOW(XGI_IOCTL_MAGIC, XGI_ESC_FB_FREE, unsigned long)
#define XGI_IOCTL_PCIE_INIT _IO(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_INIT)
#define XGI_IOCTL_PCIE_ALLOC _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_ALLOC, struct xgi_mem_alloc)
#define XGI_IOCTL_PCIE_FREE _IOW(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_FREE, unsigned long)
#define XGI_IOCTL_PUT_SCREEN_INFO _IOW(XGI_IOCTL_MAGIC, XGI_ESC_PUT_SCREEN_INFO, struct xgi_screen_info)
#define XGI_IOCTL_GET_SCREEN_INFO _IOR(XGI_IOCTL_MAGIC, XGI_ESC_GET_SCREEN_INFO, struct xgi_screen_info)
#define XGI_IOCTL_GE_RESET _IO(XGI_IOCTL_MAGIC, XGI_ESC_GE_RESET)
#define XGI_IOCTL_SAREA_INFO _IOW(XGI_IOCTL_MAGIC, XGI_ESC_SAREA_INFO, struct xgi_sarea_info)
#define XGI_IOCTL_DUMP_REGISTER _IO(XGI_IOCTL_MAGIC, XGI_ESC_DUMP_REGISTER)
#define XGI_IOCTL_DEBUG_INFO _IO(XGI_IOCTL_MAGIC, XGI_ESC_DEBUG_INFO)
#define XGI_IOCTL_MMIO_INFO _IOR(XGI_IOCTL_MAGIC, XGI_ESC_MMIO_INFO, struct xgi_mmio_info)
#define XGI_IOCTL_SUBMIT_CMDLIST _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_SUBMIT_CMDLIST, struct xgi_cmd_info)
#define XGI_IOCTL_TEST_RWINKERNEL _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_TEST_RWINKERNEL, unsigned long)
#define XGI_IOCTL_STATE_CHANGE _IOWR(XGI_IOCTL_MAGIC, XGI_ESC_STATE_CHANGE, struct xgi_state_info)
#define XGI_IOCTL_PCIE_CHECK _IO(XGI_IOCTL_MAGIC, XGI_ESC_PCIE_CHECK)
#define XGI_IOCTL_MAXNR 30
/*