intel: add sprite ioctl defines and struct for i915 sprite code
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adf1428915
commit
66518ab565
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@ -189,6 +189,8 @@ typedef struct _drm_i915_sarea {
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#define DRM_I915_OVERLAY_PUT_IMAGE 0x27
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#define DRM_I915_OVERLAY_ATTRS 0x28
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#define DRM_I915_GEM_EXECBUFFER2 0x29
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#define DRM_I915_GET_SPRITE_COLORKEY 0x2a
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#define DRM_I915_SET_SPRITE_COLORKEY 0x2b
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#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
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#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
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@ -230,6 +232,8 @@ typedef struct _drm_i915_sarea {
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#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
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#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image)
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#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
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#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
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#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
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/* Allow drivers to submit batchbuffers directly to hardware, relying
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* on the security mechanisms provided by hardware.
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@ -839,4 +843,36 @@ struct drm_intel_overlay_attrs {
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__u32 gamma5;
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};
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/*
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* Intel sprite handling
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*
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* Color keying works with a min/mask/max tuple. Both source and destination
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* color keying is allowed.
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*
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* Source keying:
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* Sprite pixels within the min & max values, masked against the color channels
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* specified in the mask field, will be transparent. All other pixels will
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* be displayed on top of the primary plane. For RGB surfaces, only the min
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* and mask fields will be used; ranged compares are not allowed.
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*
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* Destination keying:
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* Primary plane pixels that match the min value, masked against the color
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* channels specified in the mask field, will be replaced by corresponding
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* pixels from the sprite plane.
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*
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* Note that source & destination keying are exclusive; only one can be
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* active on a given plane.
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*/
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#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */
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#define I915_SET_COLORKEY_DESTINATION (1<<1)
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#define I915_SET_COLORKEY_SOURCE (1<<2)
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struct drm_intel_sprite_colorkey {
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__u32 plane_id;
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__u32 min_value;
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__u32 channel_mask;
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__u32 max_value;
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__u32 flags;
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};
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#endif /* _I915_DRM_H_ */
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