modesetting-101: Rename DPMS modes to avoid compatibility issues with xorg definitions.
parent
e810cb9243
commit
6738e7b00b
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@ -43,10 +43,10 @@ struct drm_prop_enum_list {
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* Global properties
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*/
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static struct drm_prop_enum_list drm_dpms_enum_list[] =
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{ { DPMSModeOn, "On" },
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{ DPMSModeStandby, "Standby" },
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{ DPMSModeSuspend, "Suspend" },
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{ DPMSModeOff, "Off" }
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{ { DRM_MODE_DPMS_ON, "On" },
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{ DRM_MODE_DPMS_STANDBY, "Standby" },
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{ DRM_MODE_DPMS_SUSPEND, "Suspend" },
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{ DRM_MODE_DPMS_OFF, "Off" }
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};
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char *drm_get_dpms_name(int val)
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@ -182,14 +182,14 @@ void drm_helper_disable_unused_functions(struct drm_device *dev)
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list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
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encoder_funcs = encoder->helper_private;
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if (!encoder->crtc)
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(*encoder_funcs->dpms)(encoder, DPMSModeOff);
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(*encoder_funcs->dpms)(encoder, DRM_MODE_DPMS_OFF);
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}
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list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
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struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
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crtc->enabled = drm_helper_crtc_in_use(crtc);
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if (!crtc->enabled) {
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crtc_funcs->dpms(crtc, DPMSModeOff);
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crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
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crtc->fb = NULL;
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}
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}
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@ -327,7 +327,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo,
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lvds_power_down = CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED |
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(mode->hdisplay & 0x0700) >> 8;
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ch7017_dpms(dvo, DPMSModeOff);
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ch7017_dpms(dvo, DRM_MODE_DPMS_OFF);
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ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT,
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horizontal_active_pixel_input);
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ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT,
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@ -363,7 +363,7 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, int mode)
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CH7017_DAC3_POWER_DOWN |
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CH7017_TV_POWER_DOWN_EN);
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if (mode == DPMSModeOn) {
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if (mode == DRM_MODE_DPMS_ON) {
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/* Turn on the LVDS */
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ch7017_write(dvo, CH7017_LVDS_POWER_DOWN,
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val & ~CH7017_LVDS_POWER_DOWN_EN);
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@ -418,7 +418,7 @@ static void ch7017_restore(struct intel_dvo_device *dvo)
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struct ch7017_priv *priv = dvo->dev_priv;
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/* Power down before changing mode */
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ch7017_dpms(dvo, DPMSModeOff);
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ch7017_dpms(dvo, DRM_MODE_DPMS_OFF);
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ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT, priv->save_hapi);
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ch7017_write(dvo, CH7017_VERTICAL_ACTIVE_LINE_OUTPUT, priv->save_valo);
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@ -301,7 +301,7 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
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/* set the CH7xxx power state */
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static void ch7xxx_dpms(struct intel_dvo_device *dvo, int mode)
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{
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP);
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else
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ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD);
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@ -321,13 +321,13 @@ static void ivch_dpms(struct intel_dvo_device *dvo, int mode)
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if (!ivch_read(dvo, VR01, &vr01))
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return;
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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backlight = 1;
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else
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backlight = 0;
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ivch_write(dvo, VR80, backlight);
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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vr01 |= VR01_LCD_ENABLE | VR01_DVO_ENABLE;
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else
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vr01 &= ~(VR01_LCD_ENABLE | VR01_DVO_ENABLE);
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@ -339,7 +339,7 @@ static void ivch_dpms(struct intel_dvo_device *dvo, int mode)
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if (!ivch_read(dvo, VR30, &vr30))
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break;
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if (((vr30 & VR30_PANEL_ON) != 0) == (mode == DPMSModeOn))
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if (((vr30 & VR30_PANEL_ON) != 0) == (mode == DRM_MODE_DPMS_ON))
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break;
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udelay(1000);
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}
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@ -226,7 +226,7 @@ static void sil164_dpms(struct intel_dvo_device *dvo, int mode)
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if (ret == false)
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return;
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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ch |= SIL164_8_PD;
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else
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ch &= ~SIL164_8_PD;
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@ -248,7 +248,7 @@ static void tfp410_dpms(struct intel_dvo_device *dvo, int mode)
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if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1))
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return;
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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ctl1 |= TFP410_CTL_1_PD;
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else
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ctl1 &= ~TFP410_CTL_1_PD;
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@ -44,16 +44,16 @@ static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
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temp &= ~ADPA_DAC_ENABLE;
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switch(mode) {
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case DPMSModeOn:
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case DRM_MODE_DPMS_ON:
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temp |= ADPA_DAC_ENABLE;
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break;
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case DPMSModeStandby:
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case DRM_MODE_DPMS_STANDBY:
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temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
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break;
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case DPMSModeSuspend:
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case DRM_MODE_DPMS_SUSPEND:
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temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
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break;
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case DPMSModeOff:
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case DRM_MODE_DPMS_OFF:
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temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
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break;
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}
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@ -468,12 +468,12 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
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bool enabled;
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/* XXX: When our outputs are all unaware of DPMS modes other than off
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* and on, we should map those modes to DPMSModeOff in the CRTC.
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* and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
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*/
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switch (mode) {
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case DPMSModeOn:
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case DPMSModeStandby:
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case DPMSModeSuspend:
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case DRM_MODE_DPMS_ON:
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case DRM_MODE_DPMS_STANDBY:
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case DRM_MODE_DPMS_SUSPEND:
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/* Enable the DPLL */
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temp = I915_READ(dpll_reg);
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if ((temp & DPLL_VCO_ENABLE) == 0) {
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@ -509,7 +509,7 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
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/* Give the overlay scaler a chance to enable if it's on this pipe */
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//intel_crtc_dpms_video(crtc, TRUE); TODO
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break;
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case DPMSModeOff:
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case DRM_MODE_DPMS_OFF:
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/* Give the overlay scaler a chance to disable if it's on this pipe */
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//intel_crtc_dpms_video(crtc, FALSE); TODO
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@ -558,7 +558,7 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
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if (!master_priv->sarea_priv)
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return;
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enabled = crtc->enabled && mode != DPMSModeOff;
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enabled = crtc->enabled && mode != DRM_MODE_DPMS_OFF;
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switch (pipe) {
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case 0:
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@ -580,27 +580,27 @@ static void intel_crtc_dpms(struct drm_crtc *crtc, int mode)
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static void intel_crtc_prepare (struct drm_crtc *crtc)
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{
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struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
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crtc_funcs->dpms(crtc, DPMSModeOff);
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crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
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}
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static void intel_crtc_commit (struct drm_crtc *crtc)
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{
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struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
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crtc_funcs->dpms(crtc, DPMSModeOn);
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crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
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}
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void intel_encoder_prepare (struct drm_encoder *encoder)
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{
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struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
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/* lvds has its own version of prepare see intel_lvds_prepare */
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encoder_funcs->dpms(encoder, DPMSModeOff);
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encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
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}
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void intel_encoder_commit (struct drm_encoder *encoder)
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{
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struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
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/* lvds has its own version of commit see intel_lvds_commit */
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encoder_funcs->dpms(encoder, DPMSModeOn);
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encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
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}
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static bool intel_crtc_mode_fixup(struct drm_crtc *crtc,
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@ -1145,10 +1145,10 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
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/* Make sure the crtc and connector are running */
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intel_crtc = to_intel_crtc(crtc);
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*dpms_mode = intel_crtc->dpms_mode;
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if (intel_crtc->dpms_mode != DPMSModeOn) {
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if (intel_crtc->dpms_mode != DRM_MODE_DPMS_ON) {
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crtc_funcs = crtc->helper_private;
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crtc_funcs->dpms(crtc, DPMSModeOn);
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encoder_funcs->dpms(encoder, DPMSModeOn);
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crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
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encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
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}
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return crtc;
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}
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@ -1184,9 +1184,9 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
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mode = &load_detect_mode;
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drm_crtc_helper_set_mode(crtc, mode, 0, 0);
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} else {
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if (intel_crtc->dpms_mode != DPMSModeOn) {
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if (intel_crtc->dpms_mode != DRM_MODE_DPMS_ON) {
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crtc_funcs = crtc->helper_private;
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crtc_funcs->dpms(crtc, DPMSModeOn);
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crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
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}
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/* Add this connector to the crtc */
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@ -1215,7 +1215,7 @@ void intel_release_load_detect_pipe(struct intel_output *intel_output, int dpms_
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}
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/* Switch crtc and output back off if necessary */
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if (crtc->enabled && dpms_mode != DPMSModeOn) {
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if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) {
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if (encoder->crtc == crtc)
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encoder_funcs->dpms(encoder, dpms_mode);
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crtc_funcs->dpms(crtc, dpms_mode);
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@ -1378,7 +1378,7 @@ void intel_crtc_init(struct drm_device *dev, int pipe)
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}
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intel_crtc->cursor_addr = 0;
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intel_crtc->dpms_mode = DPMSModeOff;
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intel_crtc->dpms_mode = DRM_MODE_DPMS_OFF;
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drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
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intel_crtc->mode_set.crtc = &intel_crtc->base;
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@ -93,7 +93,7 @@ static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
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u32 dvo_reg = dvo->dvo_reg;
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u32 temp = I915_READ(dvo_reg);
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if (mode == DPMSModeOn) {
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if (mode == DRM_MODE_DPMS_ON) {
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I915_WRITE(dvo_reg, temp | DVO_ENABLE);
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I915_READ(dvo_reg);
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dvo->dev_ops->dpms(dvo, mode);
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@ -93,7 +93,7 @@ static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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intel_lvds_set_power(dev, true);
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else
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intel_lvds_set_power(dev, false);
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@ -363,16 +363,16 @@ static bool intel_sdvo_set_encoder_power_state(struct intel_output *intel_output
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u8 status, state = SDVO_ENCODER_STATE_ON;
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switch (mode) {
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case DPMSModeOn:
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case DRM_MODE_DPMS_ON:
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state = SDVO_ENCODER_STATE_ON;
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break;
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case DPMSModeStandby:
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case DRM_MODE_DPMS_STANDBY:
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state = SDVO_ENCODER_STATE_STANDBY;
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break;
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case DPMSModeSuspend:
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case DRM_MODE_DPMS_SUSPEND:
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state = SDVO_ENCODER_STATE_SUSPEND;
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break;
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case DPMSModeOff:
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case DRM_MODE_DPMS_OFF:
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state = SDVO_ENCODER_STATE_OFF;
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break;
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}
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@ -691,12 +691,12 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
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struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
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u32 temp;
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if (mode != DPMSModeOn) {
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if (mode != DRM_MODE_DPMS_ON) {
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intel_sdvo_set_active_outputs(intel_output, 0);
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if (0)
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intel_sdvo_set_encoder_power_state(intel_output, mode);
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if (mode == DPMSModeOff) {
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if (mode == DRM_MODE_DPMS_OFF) {
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temp = I915_READ(sdvo_priv->output_device);
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if ((temp & SDVO_ENABLE) != 0) {
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intel_sdvo_write_sdvox(intel_output, temp & ~SDVO_ENABLE);
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@ -904,12 +904,12 @@ intel_tv_dpms(struct drm_encoder *encoder, int mode)
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struct drm_i915_private *dev_priv = dev->dev_private;
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switch(mode) {
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case DPMSModeOn:
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case DRM_MODE_DPMS_ON:
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I915_WRITE(TV_CTL, I915_READ(TV_CTL) | TV_ENC_ENABLE);
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break;
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case DPMSModeStandby:
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case DPMSModeSuspend:
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case DPMSModeOff:
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case DRM_MODE_DPMS_STANDBY:
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case DRM_MODE_DPMS_SUSPEND:
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case DRM_MODE_DPMS_OFF:
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I915_WRITE(TV_CTL, I915_READ(TV_CTL) & ~TV_ENC_ENABLE);
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break;
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}
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@ -109,17 +109,17 @@ static int nv50_dac_set_power_mode(struct nv50_output *output, int mode)
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val = NV_READ(NV50_PDISPLAY_DAC_REGS_DPMS_CTRL(or)) & ~0x7F;
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if (mode != DPMSModeOn)
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if (mode != DRM_MODE_DPMS_ON)
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val |= NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_BLANKED;
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switch (mode) {
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case DPMSModeStandby:
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case DRM_MODE_DPMS_STANDBY:
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val |= NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_HSYNC_OFF;
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break;
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case DPMSModeSuspend:
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case DRM_MODE_DPMS_SUSPEND:
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val |= NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_VSYNC_OFF;
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break;
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case DPMSModeOff:
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case DRM_MODE_DPMS_OFF:
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val |= NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_OFF;
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val |= NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_HSYNC_OFF;
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val |= NV50_PDISPLAY_DAC_REGS_DPMS_CTRL_VSYNC_OFF;
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@ -681,7 +681,7 @@ int nv50_kms_crtc_set_config(struct drm_mode_set *set)
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if (output->crtc != crtc)
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continue;
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rval = output->set_power_mode(output, DPMSModeOn);
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rval = output->set_power_mode(output, DRM_MODE_DPMS_ON);
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if (rval != 0) {
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DRM_ERROR("output set power mode failed\n");
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goto out;
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@ -698,7 +698,7 @@ int nv50_kms_crtc_set_config(struct drm_mode_set *set)
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rval = drm_connector_property_set_value(drm_connector,
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dev->mode_config.dpms_property,
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DPMSModeOn);
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DRM_MODE_DPMS_ON);
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if (rval != 0) {
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DRM_ERROR("failed to update dpms state\n");
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goto out;
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@ -127,7 +127,7 @@ static int nv50_sor_set_power_mode(struct nv50_output *output, int mode)
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val = NV_READ(NV50_PDISPLAY_SOR_REGS_DPMS_CTRL(or));
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if (mode == DPMSModeOn)
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if (mode == DRM_MODE_DPMS_ON)
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val |= NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_ON;
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else
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val &= ~NV50_PDISPLAY_SOR_REGS_DPMS_CTRL_ON;
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@ -1028,10 +1028,11 @@ struct drm_mm_info_arg {
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#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
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/* DPMS flags */
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#define DPMSModeOn 0
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#define DPMSModeStandby 1
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#define DPMSModeSuspend 2
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#define DPMSModeOff 3
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/* bit compatible with the xorg definitions. */
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#define DRM_MODE_DPMS_ON 0
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#define DRM_MODE_DPMS_STANDBY 1
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#define DRM_MODE_DPMS_SUSPEND 2
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#define DRM_MODE_DPMS_OFF 3
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struct drm_mode_modeinfo {
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unsigned int clock;
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||||
|
|
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Reference in New Issue