intel/intel_chipset: Move IS_9XX below IS_GEN10.
No functional change. Just organizing the code so it gets clear for future platforms. Paulo deserves credits becuase he was the one that just noticed this IS_9XX was in the wrong position after CNL patches got introduced. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>main
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@ -499,15 +499,6 @@
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IS_GEMINILAKE(devid) || \
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IS_COFFEELAKE(devid))
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#define IS_9XX(dev) (IS_GEN3(dev) || \
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IS_GEN4(dev) || \
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IS_GEN5(dev) || \
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IS_GEN6(dev) || \
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IS_GEN7(dev) || \
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IS_GEN8(dev) || \
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IS_GEN9(dev) || \
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IS_GEN10(dev))
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#define IS_CNL_Y(devid) ((devid) == PCI_CHIP_CANNONLAKE_Y_GT2_0 || \
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(devid) == PCI_CHIP_CANNONLAKE_Y_GT2_1 || \
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(devid) == PCI_CHIP_CANNONLAKE_Y_GT2_2 || \
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@ -525,4 +516,13 @@
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#define IS_GEN10(devid) (IS_CANNONLAKE(devid))
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#define IS_9XX(dev) (IS_GEN3(dev) || \
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IS_GEN4(dev) || \
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IS_GEN5(dev) || \
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IS_GEN6(dev) || \
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IS_GEN7(dev) || \
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IS_GEN8(dev) || \
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IS_GEN9(dev) || \
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IS_GEN10(dev))
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#endif /* _INTEL_CHIPSET_H */
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