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Use register writes instead of BITBLT_MULTI packets for buffer swap blits. 

This takes up two more ring buffer entries per rectangle blitted but makes sure
the blit is performed top to bottom, reducing the likelyhood of tearing.
main
Michel Dänzer 2006-09-15 16:37:47 +02:00
parent 3cc64a943a
commit 6ba9127753
2 changed files with 7 additions and 2 deletions
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3
shared-core/radeon_drv.h
View File

@ -423,6 +423,8 @@ extern int r300_do_cp_cmdbuf(drm_device_t *dev, DRMFILE filp,
#define RADEON_RB3D_COLOROFFSET 0x1c40 #define RADEON_RB3D_COLOROFFSET 0x1c40
#define RADEON_RB3D_COLORPITCH 0x1c48 #define RADEON_RB3D_COLORPITCH 0x1c48
#define RADEON_SRC_X_Y 0x1590
#define RADEON_DP_GUI_MASTER_CNTL 0x146c #define RADEON_DP_GUI_MASTER_CNTL 0x146c
# define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) # define RADEON_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
# define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) # define RADEON_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
@ -440,6 +442,7 @@ extern int r300_do_cp_cmdbuf(drm_device_t *dev, DRMFILE filp,
# define RADEON_ROP3_S 0x00cc0000 # define RADEON_ROP3_S 0x00cc0000
# define RADEON_ROP3_P 0x00f00000 # define RADEON_ROP3_P 0x00f00000
#define RADEON_DP_WRITE_MASK 0x16cc #define RADEON_DP_WRITE_MASK 0x16cc
#define RADEON_SRC_PITCH_OFFSET 0x1428
#define RADEON_DST_PITCH_OFFSET 0x142c #define RADEON_DST_PITCH_OFFSET 0x142c
#define RADEON_DST_PITCH_OFFSET_C 0x1c80 #define RADEON_DST_PITCH_OFFSET_C 0x1c80
# define RADEON_DST_TILE_LINEAR (0 << 30) # define RADEON_DST_TILE_LINEAR (0 << 30)

6
shared-core/radeon_state.c
View File

@ -1262,9 +1262,9 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", x, y, w, h); DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", x, y, w, h);
BEGIN_RING(7); BEGIN_RING(9);
OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5)); OUT_RING(CP_PACKET0(RADEON_DP_GUI_MASTER_CNTL, 0));
OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL | OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_DST_PITCH_OFFSET_CNTL |
RADEON_GMC_BRUSH_NONE | RADEON_GMC_BRUSH_NONE |
@ -1276,6 +1276,7 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
/* Make this work even if front & back are flipped: /* Make this work even if front & back are flipped:
*/ */
OUT_RING(CP_PACKET0(RADEON_SRC_PITCH_OFFSET, 1));
if (dev_priv->current_page == 0) { if (dev_priv->current_page == 0) {
OUT_RING(dev_priv->back_pitch_offset); OUT_RING(dev_priv->back_pitch_offset);
OUT_RING(dev_priv->front_pitch_offset); OUT_RING(dev_priv->front_pitch_offset);
@ -1284,6 +1285,7 @@ static void radeon_cp_dispatch_swap(drm_device_t * dev)
OUT_RING(dev_priv->back_pitch_offset); OUT_RING(dev_priv->back_pitch_offset);
} }
OUT_RING(CP_PACKET0(RADEON_SRC_X_Y, 2));
OUT_RING((x << 16) | y); OUT_RING((x << 16) | y);
OUT_RING((x << 16) | y); OUT_RING((x << 16) | y);
OUT_RING((w << 16) | h); OUT_RING((w << 16) | h);