geemili
/
drm
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

radeon: indentation & trailing space cleanup

main
Jerome Glisse 2010-01-14 11:24:16 +01:00
parent b06cb754a1
commit 6bf1ed2979
8 changed files with 189 additions and 165 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

60
radeon/radeon_bo.c
View File

@ -1,8 +1,38 @@
/*
* Copyright © 2008 Dave Airlie
* Copyright © 2008 Jérôme Glisse
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
/*
* Authors:
* Dave Airlie
* Jérôme Glisse <glisse@freedesktop.org>
*/
#include <radeon_bo.h> #include <radeon_bo.h>
#include <radeon_bo_int.h> #include <radeon_bo_int.h>
void radeon_bo_debug(struct radeon_bo *bo, void radeon_bo_debug(struct radeon_bo *bo, const char *op)
const char *op)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
@ -11,11 +41,11 @@ void radeon_bo_debug(struct radeon_bo *bo,
} }
struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom, struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom,
uint32_t handle, uint32_t handle,
uint32_t size, uint32_t size,
uint32_t alignment, uint32_t alignment,
uint32_t domains, uint32_t domains,
uint32_t flags) uint32_t flags)
{ {
struct radeon_bo *bo; struct radeon_bo *bo;
bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags); bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags);
@ -55,26 +85,25 @@ int radeon_bo_wait(struct radeon_bo *bo)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
if (!boi->bom->funcs->bo_wait) if (!boi->bom->funcs->bo_wait)
return 0; return 0;
return boi->bom->funcs->bo_wait(boi); return boi->bom->funcs->bo_wait(boi);
} }
int radeon_bo_is_busy(struct radeon_bo *bo, int radeon_bo_is_busy(struct radeon_bo *bo, uint32_t *domain)
uint32_t *domain)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
return boi->bom->funcs->bo_is_busy(boi, domain); return boi->bom->funcs->bo_is_busy(boi, domain);
} }
int radeon_bo_set_tiling(struct radeon_bo *bo, int radeon_bo_set_tiling(struct radeon_bo *bo,
uint32_t tiling_flags, uint32_t pitch) uint32_t tiling_flags, uint32_t pitch)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
return boi->bom->funcs->bo_set_tiling(boi, tiling_flags, pitch); return boi->bom->funcs->bo_set_tiling(boi, tiling_flags, pitch);
} }
int radeon_bo_get_tiling(struct radeon_bo *bo, int radeon_bo_get_tiling(struct radeon_bo *bo,
uint32_t *tiling_flags, uint32_t *pitch) uint32_t *tiling_flags, uint32_t *pitch)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
return boi->bom->funcs->bo_get_tiling(boi, tiling_flags, pitch); return boi->bom->funcs->bo_get_tiling(boi, tiling_flags, pitch);
@ -84,12 +113,11 @@ int radeon_bo_is_static(struct radeon_bo *bo)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
if (boi->bom->funcs->bo_is_static) if (boi->bom->funcs->bo_is_static)
return boi->bom->funcs->bo_is_static(boi); return boi->bom->funcs->bo_is_static(boi);
return 0; return 0;
} }
int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, struct radeon_cs *cs)
struct radeon_cs *cs)
{ {
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
return boi->cref > 1; return boi->cref > 1;
@ -107,7 +135,7 @@ uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo)
src_domain = boi->space_accounted & 0xffff; src_domain = boi->space_accounted & 0xffff;
if (!src_domain) if (!src_domain)
src_domain = boi->space_accounted >> 16; src_domain = boi->space_accounted >> 16;
return src_domain; return src_domain;
} }

16
radeon/radeon_bo.h
View File

@ -49,15 +49,14 @@ struct radeon_bo {
struct radeon_bo_manager; struct radeon_bo_manager;
void radeon_bo_debug(struct radeon_bo *bo, void radeon_bo_debug(struct radeon_bo *bo, const char *op);
const char *op);
struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom, struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom,
uint32_t handle, uint32_t handle,
uint32_t size, uint32_t size,
uint32_t alignment, uint32_t alignment,
uint32_t domains, uint32_t domains,
uint32_t flags); uint32_t flags);
void radeon_bo_ref(struct radeon_bo *bo); void radeon_bo_ref(struct radeon_bo *bo);
struct radeon_bo *radeon_bo_unref(struct radeon_bo *bo); struct radeon_bo *radeon_bo_unref(struct radeon_bo *bo);
@ -68,8 +67,7 @@ int radeon_bo_is_busy(struct radeon_bo *bo, uint32_t *domain);
int radeon_bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags, uint32_t pitch); int radeon_bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags, uint32_t pitch);
int radeon_bo_get_tiling(struct radeon_bo *bo, uint32_t *tiling_flags, uint32_t *pitch); int radeon_bo_get_tiling(struct radeon_bo *bo, uint32_t *tiling_flags, uint32_t *pitch);
int radeon_bo_is_static(struct radeon_bo *bo); int radeon_bo_is_static(struct radeon_bo *bo);
int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, struct radeon_cs *cs);
struct radeon_cs *cs);
uint32_t radeon_bo_get_handle(struct radeon_bo *bo); uint32_t radeon_bo_get_handle(struct radeon_bo *bo);
uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo); uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo);
#endif #endif

24
radeon/radeon_bo_gem.c
View File

@ -156,7 +156,7 @@ static int bo_map(struct radeon_bo_int *boi, int write)
return 0; return 0;
} }
if (bo_gem->priv_ptr) { if (bo_gem->priv_ptr) {
goto wait; goto wait;
} }
boi->ptr = NULL; boi->ptr = NULL;
@ -223,14 +223,14 @@ static int bo_is_busy(struct radeon_bo_int *boi, uint32_t *domain)
args.domain = 0; args.domain = 0;
ret = drmCommandWriteRead(boi->bom->fd, DRM_RADEON_GEM_BUSY, ret = drmCommandWriteRead(boi->bom->fd, DRM_RADEON_GEM_BUSY,
&args, sizeof(args)); &args, sizeof(args));
*domain = args.domain; *domain = args.domain;
return ret; return ret;
} }
static int bo_set_tiling(struct radeon_bo_int *boi, uint32_t tiling_flags, static int bo_set_tiling(struct radeon_bo_int *boi, uint32_t tiling_flags,
uint32_t pitch) uint32_t pitch)
{ {
struct drm_radeon_gem_set_tiling args; struct drm_radeon_gem_set_tiling args;
int r; int r;
@ -240,14 +240,14 @@ static int bo_set_tiling(struct radeon_bo_int *boi, uint32_t tiling_flags,
args.pitch = pitch; args.pitch = pitch;
r = drmCommandWriteRead(boi->bom->fd, r = drmCommandWriteRead(boi->bom->fd,
DRM_RADEON_GEM_SET_TILING, DRM_RADEON_GEM_SET_TILING,
&args, &args,
sizeof(args)); sizeof(args));
return r; return r;
} }
static int bo_get_tiling(struct radeon_bo_int *boi, uint32_t *tiling_flags, static int bo_get_tiling(struct radeon_bo_int *boi, uint32_t *tiling_flags,
uint32_t *pitch) uint32_t *pitch)
{ {
struct drm_radeon_gem_set_tiling args; struct drm_radeon_gem_set_tiling args;
int r; int r;
@ -255,12 +255,12 @@ static int bo_get_tiling(struct radeon_bo_int *boi, uint32_t *tiling_flags,
args.handle = boi->handle; args.handle = boi->handle;
r = drmCommandWriteRead(boi->bom->fd, r = drmCommandWriteRead(boi->bom->fd,
DRM_RADEON_GEM_GET_TILING, DRM_RADEON_GEM_GET_TILING,
&args, &args,
sizeof(args)); sizeof(args));
if (r) if (r)
return r; return r;
*tiling_flags = args.tiling_flags; *tiling_flags = args.tiling_flags;
*pitch = args.pitch; *pitch = args.pitch;
@ -318,7 +318,7 @@ int radeon_gem_get_kernel_name(struct radeon_bo *bo, uint32_t *name)
flink.handle = bo->handle; flink.handle = bo->handle;
r = drmIoctl(boi->bom->fd, DRM_IOCTL_GEM_FLINK, &flink); r = drmIoctl(boi->bom->fd, DRM_IOCTL_GEM_FLINK, &flink);
if (r) { if (r) {
return r; return r;
} }
*name = flink.name; *name = flink.name;
return 0; return 0;

4
radeon/radeon_bo_int.h
View File

@ -35,9 +35,9 @@ struct radeon_bo_funcs {
int (*bo_wait)(struct radeon_bo_int *bo); int (*bo_wait)(struct radeon_bo_int *bo);
int (*bo_is_static)(struct radeon_bo_int *bo); int (*bo_is_static)(struct radeon_bo_int *bo);
int (*bo_set_tiling)(struct radeon_bo_int *bo, uint32_t tiling_flags, int (*bo_set_tiling)(struct radeon_bo_int *bo, uint32_t tiling_flags,
uint32_t pitch); uint32_t pitch);
int (*bo_get_tiling)(struct radeon_bo_int *bo, uint32_t *tiling_flags, int (*bo_get_tiling)(struct radeon_bo_int *bo, uint32_t *tiling_flags,
uint32_t *pitch); uint32_t *pitch);
int (*bo_is_busy)(struct radeon_bo_int *bo, uint32_t *domain); int (*bo_is_busy)(struct radeon_bo_int *bo, uint32_t *domain);
int (*bo_is_referenced_by_cs)(struct radeon_bo_int *bo, struct radeon_cs *cs); int (*bo_is_referenced_by_cs)(struct radeon_bo_int *bo, struct radeon_cs *cs);
}; };

38
radeon/radeon_cs.h
View File

@ -63,16 +63,16 @@ struct radeon_cs {
struct radeon_cs_manager; struct radeon_cs_manager;
extern struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm, extern struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
uint32_t ndw); uint32_t ndw);
extern int radeon_cs_begin(struct radeon_cs *cs, extern int radeon_cs_begin(struct radeon_cs *cs,
uint32_t ndw, uint32_t ndw,
const char *file, const char *file,
const char *func, int line); const char *func, int line);
extern int radeon_cs_end(struct radeon_cs *cs, extern int radeon_cs_end(struct radeon_cs *cs,
const char *file, const char *file,
const char *func, const char *func,
int line); int line);
extern int radeon_cs_emit(struct radeon_cs *cs); extern int radeon_cs_emit(struct radeon_cs *cs);
extern int radeon_cs_destroy(struct radeon_cs *cs); extern int radeon_cs_destroy(struct radeon_cs *cs);
extern int radeon_cs_erase(struct radeon_cs *cs); extern int radeon_cs_erase(struct radeon_cs *cs);
@ -81,10 +81,10 @@ extern void radeon_cs_print(struct radeon_cs *cs, FILE *file);
extern void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit); extern void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit);
extern void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data); extern void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data);
extern int radeon_cs_write_reloc(struct radeon_cs *cs, extern int radeon_cs_write_reloc(struct radeon_cs *cs,
struct radeon_bo *bo, struct radeon_bo *bo,
uint32_t read_domain, uint32_t read_domain,
uint32_t write_domain, uint32_t write_domain,
uint32_t flags); uint32_t flags);
/* /*
* add a persistent BO to the list * add a persistent BO to the list
@ -94,9 +94,9 @@ extern int radeon_cs_write_reloc(struct radeon_cs *cs,
* is a state emission with a color/textures etc followed by a bunch of vertices. * is a state emission with a color/textures etc followed by a bunch of vertices.
*/ */
void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs,
struct radeon_bo *bo, struct radeon_bo *bo,
uint32_t read_domains, uint32_t read_domains,
uint32_t write_domain); uint32_t write_domain);
/* reset the persistent BO list */ /* reset the persistent BO list */
void radeon_cs_space_reset_bos(struct radeon_cs *cs); void radeon_cs_space_reset_bos(struct radeon_cs *cs);
@ -108,9 +108,9 @@ int radeon_cs_space_check(struct radeon_cs *cs);
* a temporary BO is like a DMA buffer, which gets flushed with the * a temporary BO is like a DMA buffer, which gets flushed with the
* command buffer */ * command buffer */
int radeon_cs_space_check_with_bo(struct radeon_cs *cs, int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
struct radeon_bo *bo, struct radeon_bo *bo,
uint32_t read_domains, uint32_t read_domains,
uint32_t write_domain); uint32_t write_domain);
static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword) static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
{ {
@ -130,12 +130,12 @@ static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword)
} }
static inline void radeon_cs_write_table(struct radeon_cs *cs, static inline void radeon_cs_write_table(struct radeon_cs *cs,
void *data, uint32_t size) void *data, uint32_t size)
{ {
memcpy(cs->packets + cs->cdw, data, size * 4); memcpy(cs->packets + cs->cdw, data, size * 4);
cs->cdw += size; cs->cdw += size;
if (cs->section_ndw) { if (cs->section_ndw) {
cs->section_cdw += size; cs->section_cdw += size;
} }
} }
#endif #endif

148
radeon/radeon_cs_space.c
View File

@ -50,54 +50,54 @@ static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct ra
/* legacy needs a static check */ /* legacy needs a static check */
if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) { if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) {
bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain; bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
return 0; return 0;
} }
/* already accounted this bo */ /* already accounted this bo */
if (write_domain && (write_domain == bo->space_accounted)) { if (write_domain && (write_domain == bo->space_accounted)) {
sc->new_accounted = bo->space_accounted; sc->new_accounted = bo->space_accounted;
return 0; return 0;
} }
if (read_domains && ((read_domains << 16) == bo->space_accounted)) { if (read_domains && ((read_domains << 16) == bo->space_accounted)) {
sc->new_accounted = bo->space_accounted; sc->new_accounted = bo->space_accounted;
return 0; return 0;
} }
if (bo->space_accounted == 0) { if (bo->space_accounted == 0) {
if (write_domain == RADEON_GEM_DOMAIN_VRAM) if (write_domain == RADEON_GEM_DOMAIN_VRAM)
sizes->op_vram_write += bo->size; sizes->op_vram_write += bo->size;
else if (write_domain == RADEON_GEM_DOMAIN_GTT) else if (write_domain == RADEON_GEM_DOMAIN_GTT)
sizes->op_gart_write += bo->size; sizes->op_gart_write += bo->size;
else else
sizes->op_read += bo->size; sizes->op_read += bo->size;
sc->new_accounted = (read_domains << 16) | write_domain; sc->new_accounted = (read_domains << 16) | write_domain;
} else { } else {
uint16_t old_read, old_write; uint16_t old_read, old_write;
old_read = bo->space_accounted >> 16; old_read = bo->space_accounted >> 16;
old_write = bo->space_accounted & 0xffff; old_write = bo->space_accounted & 0xffff;
if (write_domain && (old_read & write_domain)) { if (write_domain && (old_read & write_domain)) {
sc->new_accounted = write_domain; sc->new_accounted = write_domain;
/* moving from read to a write domain */ /* moving from read to a write domain */
if (write_domain == RADEON_GEM_DOMAIN_VRAM) { if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
sizes->op_read -= bo->size; sizes->op_read -= bo->size;
sizes->op_vram_write += bo->size; sizes->op_vram_write += bo->size;
} else if (write_domain == RADEON_GEM_DOMAIN_GTT) { } else if (write_domain == RADEON_GEM_DOMAIN_GTT) {
sizes->op_read -= bo->size; sizes->op_read -= bo->size;
sizes->op_gart_write += bo->size; sizes->op_gart_write += bo->size;
} }
} else if (read_domains & old_write) { } else if (read_domains & old_write) {
sc->new_accounted = bo->space_accounted & 0xffff; sc->new_accounted = bo->space_accounted & 0xffff;
} else { } else {
/* rewrite the domains */ /* rewrite the domains */
if (write_domain != old_write) if (write_domain != old_write)
fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write); fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
if (read_domains != old_read) if (read_domains != old_read)
fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read); fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
return RADEON_CS_SPACE_FLUSH; return RADEON_CS_SPACE_FLUSH;
} }
} }
return 0; return 0;
} }
@ -113,35 +113,35 @@ static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_s
/* check the totals for this operation */ /* check the totals for this operation */
if (cs->bo_count == 0 && !new_tmp) if (cs->bo_count == 0 && !new_tmp)
return 0; return 0;
memset(&sizes, 0, sizeof(struct rad_sizes)); memset(&sizes, 0, sizeof(struct rad_sizes));
/* prepare */ /* prepare */
for (i = 0; i < cs->bo_count; i++) { for (i = 0; i < cs->bo_count; i++) {
ret = radeon_cs_setup_bo(&cs->bos[i], &sizes); ret = radeon_cs_setup_bo(&cs->bos[i], &sizes);
if (ret) if (ret)
return ret; return ret;
} }
if (new_tmp) { if (new_tmp) {
ret = radeon_cs_setup_bo(new_tmp, &sizes); ret = radeon_cs_setup_bo(new_tmp, &sizes);
if (ret) if (ret)
return ret; return ret;
} }
if (sizes.op_read < 0) if (sizes.op_read < 0)
sizes.op_read = 0; sizes.op_read = 0;
/* check sizes - operation first */ /* check sizes - operation first */
if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) || if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) ||
(sizes.op_vram_write > csm->vram_limit)) { (sizes.op_vram_write > csm->vram_limit)) {
return RADEON_CS_SPACE_OP_TO_BIG; return RADEON_CS_SPACE_OP_TO_BIG;
} }
if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) || if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) ||
((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) { ((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) {
return RADEON_CS_SPACE_FLUSH; return RADEON_CS_SPACE_FLUSH;
} }
csm->gart_write_used += sizes.op_gart_write; csm->gart_write_used += sizes.op_gart_write;
@ -149,11 +149,11 @@ static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_s
csm->read_used += sizes.op_read; csm->read_used += sizes.op_read;
/* commit */ /* commit */
for (i = 0; i < cs->bo_count; i++) { for (i = 0; i < cs->bo_count; i++) {
bo = cs->bos[i].bo; bo = cs->bos[i].bo;
bo->space_accounted = cs->bos[i].new_accounted; bo->space_accounted = cs->bos[i].new_accounted;
} }
if (new_tmp) if (new_tmp)
new_tmp->bo->space_accounted = new_tmp->new_accounted; new_tmp->bo->space_accounted = new_tmp->new_accounted;
return RADEON_CS_SPACE_OK; return RADEON_CS_SPACE_OK;
} }
@ -164,10 +164,10 @@ void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *b
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
int i; int i;
for (i = 0; i < csi->bo_count; i++) { for (i = 0; i < csi->bo_count; i++) {
if (csi->bos[i].bo == boi && if (csi->bos[i].bo == boi &&
csi->bos[i].read_domains == read_domains && csi->bos[i].read_domains == read_domains &&
csi->bos[i].write_domain == write_domain) csi->bos[i].write_domain == write_domain)
return; return;
} }
radeon_bo_ref(bo); radeon_bo_ref(bo);
i = csi->bo_count; i = csi->bo_count;
@ -181,7 +181,7 @@ void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *b
} }
static int radeon_cs_check_space_internal(struct radeon_cs_int *cs, static int radeon_cs_check_space_internal(struct radeon_cs_int *cs,
struct radeon_cs_space_check *tmp_bo) struct radeon_cs_space_check *tmp_bo)
{ {
int ret; int ret;
int flushed = 0; int flushed = 0;
@ -189,20 +189,20 @@ static int radeon_cs_check_space_internal(struct radeon_cs_int *cs,
again: again:
ret = radeon_cs_do_space_check(cs, tmp_bo); ret = radeon_cs_do_space_check(cs, tmp_bo);
if (ret == RADEON_CS_SPACE_OP_TO_BIG) if (ret == RADEON_CS_SPACE_OP_TO_BIG)
return -1; return -1;
if (ret == RADEON_CS_SPACE_FLUSH) { if (ret == RADEON_CS_SPACE_FLUSH) {
(*cs->space_flush_fn)(cs->space_flush_data); (*cs->space_flush_fn)(cs->space_flush_data);
if (flushed) if (flushed)
return -1; return -1;
flushed = 1; flushed = 1;
goto again; goto again;
} }
return 0; return 0;
} }
int radeon_cs_space_check_with_bo(struct radeon_cs *cs, int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
struct radeon_bo *bo, struct radeon_bo *bo,
uint32_t read_domains, uint32_t write_domain) uint32_t read_domains, uint32_t write_domain)
{ {
struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo; struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
@ -211,10 +211,10 @@ int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
int ret = 0; int ret = 0;
if (bo) { if (bo) {
temp_bo.bo = boi; temp_bo.bo = boi;
temp_bo.read_domains = read_domains; temp_bo.read_domains = read_domains;
temp_bo.write_domain = write_domain; temp_bo.write_domain = write_domain;
temp_bo.new_accounted = 0; temp_bo.new_accounted = 0;
} }
ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL); ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL);
@ -232,13 +232,11 @@ void radeon_cs_space_reset_bos(struct radeon_cs *cs)
struct radeon_cs_int *csi = (struct radeon_cs_int *)cs; struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
int i; int i;
for (i = 0; i < csi->bo_count; i++) { for (i = 0; i < csi->bo_count; i++) {
radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo); radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo);
csi->bos[i].bo = NULL; csi->bos[i].bo = NULL;
csi->bos[i].read_domains = 0; csi->bos[i].read_domains = 0;
csi->bos[i].write_domain = 0; csi->bos[i].write_domain = 0;
csi->bos[i].new_accounted = 0; csi->bos[i].new_accounted = 0;
} }
csi->bo_count = 0; csi->bo_count = 0;
} }