radeon: indentation & trailing space cleanup
parent
b06cb754a1
commit
6bf1ed2979
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@ -1,8 +1,38 @@
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/*
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* Copyright © 2008 Dave Airlie
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* Copyright © 2008 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/*
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* Authors:
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* Dave Airlie
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* Jérôme Glisse <glisse@freedesktop.org>
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*/
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#include <radeon_bo.h>
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#include <radeon_bo_int.h>
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void radeon_bo_debug(struct radeon_bo *bo,
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const char *op)
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void radeon_bo_debug(struct radeon_bo *bo, const char *op)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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@ -11,11 +41,11 @@ void radeon_bo_debug(struct radeon_bo *bo,
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}
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struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom,
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uint32_t handle,
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uint32_t size,
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uint32_t alignment,
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uint32_t domains,
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uint32_t flags)
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uint32_t handle,
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uint32_t size,
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uint32_t alignment,
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uint32_t domains,
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uint32_t flags)
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{
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struct radeon_bo *bo;
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bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags);
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@ -55,26 +85,25 @@ int radeon_bo_wait(struct radeon_bo *bo)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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if (!boi->bom->funcs->bo_wait)
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return 0;
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return 0;
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return boi->bom->funcs->bo_wait(boi);
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}
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int radeon_bo_is_busy(struct radeon_bo *bo,
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uint32_t *domain)
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int radeon_bo_is_busy(struct radeon_bo *bo, uint32_t *domain)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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return boi->bom->funcs->bo_is_busy(boi, domain);
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}
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int radeon_bo_set_tiling(struct radeon_bo *bo,
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uint32_t tiling_flags, uint32_t pitch)
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uint32_t tiling_flags, uint32_t pitch)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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return boi->bom->funcs->bo_set_tiling(boi, tiling_flags, pitch);
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}
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int radeon_bo_get_tiling(struct radeon_bo *bo,
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uint32_t *tiling_flags, uint32_t *pitch)
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uint32_t *tiling_flags, uint32_t *pitch)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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return boi->bom->funcs->bo_get_tiling(boi, tiling_flags, pitch);
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@ -84,12 +113,11 @@ int radeon_bo_is_static(struct radeon_bo *bo)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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if (boi->bom->funcs->bo_is_static)
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return boi->bom->funcs->bo_is_static(boi);
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return boi->bom->funcs->bo_is_static(boi);
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return 0;
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}
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int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo,
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struct radeon_cs *cs)
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int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, struct radeon_cs *cs)
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{
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struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
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return boi->cref > 1;
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@ -107,7 +135,7 @@ uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo)
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src_domain = boi->space_accounted & 0xffff;
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if (!src_domain)
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src_domain = boi->space_accounted >> 16;
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src_domain = boi->space_accounted >> 16;
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return src_domain;
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}
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@ -49,15 +49,14 @@ struct radeon_bo {
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struct radeon_bo_manager;
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void radeon_bo_debug(struct radeon_bo *bo,
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const char *op);
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void radeon_bo_debug(struct radeon_bo *bo, const char *op);
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struct radeon_bo *radeon_bo_open(struct radeon_bo_manager *bom,
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uint32_t handle,
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uint32_t size,
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uint32_t alignment,
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uint32_t domains,
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uint32_t flags);
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uint32_t handle,
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uint32_t size,
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uint32_t alignment,
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uint32_t domains,
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uint32_t flags);
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void radeon_bo_ref(struct radeon_bo *bo);
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struct radeon_bo *radeon_bo_unref(struct radeon_bo *bo);
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@ -68,8 +67,7 @@ int radeon_bo_is_busy(struct radeon_bo *bo, uint32_t *domain);
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int radeon_bo_set_tiling(struct radeon_bo *bo, uint32_t tiling_flags, uint32_t pitch);
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int radeon_bo_get_tiling(struct radeon_bo *bo, uint32_t *tiling_flags, uint32_t *pitch);
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int radeon_bo_is_static(struct radeon_bo *bo);
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int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo,
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struct radeon_cs *cs);
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int radeon_bo_is_referenced_by_cs(struct radeon_bo *bo, struct radeon_cs *cs);
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uint32_t radeon_bo_get_handle(struct radeon_bo *bo);
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uint32_t radeon_bo_get_src_domain(struct radeon_bo *bo);
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#endif
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@ -156,7 +156,7 @@ static int bo_map(struct radeon_bo_int *boi, int write)
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return 0;
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}
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if (bo_gem->priv_ptr) {
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goto wait;
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goto wait;
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}
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boi->ptr = NULL;
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@ -223,14 +223,14 @@ static int bo_is_busy(struct radeon_bo_int *boi, uint32_t *domain)
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args.domain = 0;
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ret = drmCommandWriteRead(boi->bom->fd, DRM_RADEON_GEM_BUSY,
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&args, sizeof(args));
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&args, sizeof(args));
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*domain = args.domain;
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return ret;
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}
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static int bo_set_tiling(struct radeon_bo_int *boi, uint32_t tiling_flags,
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uint32_t pitch)
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uint32_t pitch)
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{
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struct drm_radeon_gem_set_tiling args;
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int r;
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@ -240,14 +240,14 @@ static int bo_set_tiling(struct radeon_bo_int *boi, uint32_t tiling_flags,
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args.pitch = pitch;
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r = drmCommandWriteRead(boi->bom->fd,
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DRM_RADEON_GEM_SET_TILING,
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&args,
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sizeof(args));
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DRM_RADEON_GEM_SET_TILING,
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&args,
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sizeof(args));
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return r;
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}
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static int bo_get_tiling(struct radeon_bo_int *boi, uint32_t *tiling_flags,
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uint32_t *pitch)
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uint32_t *pitch)
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{
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struct drm_radeon_gem_set_tiling args;
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int r;
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@ -255,12 +255,12 @@ static int bo_get_tiling(struct radeon_bo_int *boi, uint32_t *tiling_flags,
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args.handle = boi->handle;
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r = drmCommandWriteRead(boi->bom->fd,
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DRM_RADEON_GEM_GET_TILING,
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&args,
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sizeof(args));
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DRM_RADEON_GEM_GET_TILING,
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&args,
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sizeof(args));
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if (r)
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return r;
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return r;
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*tiling_flags = args.tiling_flags;
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*pitch = args.pitch;
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@ -318,7 +318,7 @@ int radeon_gem_get_kernel_name(struct radeon_bo *bo, uint32_t *name)
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flink.handle = bo->handle;
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r = drmIoctl(boi->bom->fd, DRM_IOCTL_GEM_FLINK, &flink);
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if (r) {
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return r;
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return r;
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}
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*name = flink.name;
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return 0;
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@ -35,9 +35,9 @@ struct radeon_bo_funcs {
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int (*bo_wait)(struct radeon_bo_int *bo);
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int (*bo_is_static)(struct radeon_bo_int *bo);
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int (*bo_set_tiling)(struct radeon_bo_int *bo, uint32_t tiling_flags,
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uint32_t pitch);
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uint32_t pitch);
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int (*bo_get_tiling)(struct radeon_bo_int *bo, uint32_t *tiling_flags,
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uint32_t *pitch);
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uint32_t *pitch);
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int (*bo_is_busy)(struct radeon_bo_int *bo, uint32_t *domain);
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int (*bo_is_referenced_by_cs)(struct radeon_bo_int *bo, struct radeon_cs *cs);
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};
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struct radeon_cs_manager;
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extern struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
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uint32_t ndw);
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uint32_t ndw);
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extern int radeon_cs_begin(struct radeon_cs *cs,
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uint32_t ndw,
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const char *file,
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const char *func, int line);
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uint32_t ndw,
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const char *file,
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const char *func, int line);
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extern int radeon_cs_end(struct radeon_cs *cs,
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const char *file,
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const char *func,
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int line);
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const char *file,
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const char *func,
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int line);
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extern int radeon_cs_emit(struct radeon_cs *cs);
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extern int radeon_cs_destroy(struct radeon_cs *cs);
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extern int radeon_cs_erase(struct radeon_cs *cs);
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extern void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit);
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extern void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data);
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extern int radeon_cs_write_reloc(struct radeon_cs *cs,
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struct radeon_bo *bo,
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uint32_t read_domain,
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uint32_t write_domain,
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uint32_t flags);
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struct radeon_bo *bo,
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uint32_t read_domain,
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uint32_t write_domain,
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uint32_t flags);
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/*
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* add a persistent BO to the list
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@ -94,9 +94,9 @@ extern int radeon_cs_write_reloc(struct radeon_cs *cs,
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* is a state emission with a color/textures etc followed by a bunch of vertices.
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*/
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void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs,
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struct radeon_bo *bo,
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uint32_t read_domains,
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uint32_t write_domain);
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struct radeon_bo *bo,
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uint32_t read_domains,
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uint32_t write_domain);
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/* reset the persistent BO list */
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void radeon_cs_space_reset_bos(struct radeon_cs *cs);
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@ -108,9 +108,9 @@ int radeon_cs_space_check(struct radeon_cs *cs);
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* a temporary BO is like a DMA buffer, which gets flushed with the
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* command buffer */
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int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
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struct radeon_bo *bo,
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uint32_t read_domains,
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uint32_t write_domain);
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struct radeon_bo *bo,
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uint32_t read_domains,
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uint32_t write_domain);
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static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
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{
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@ -130,12 +130,12 @@ static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword)
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}
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static inline void radeon_cs_write_table(struct radeon_cs *cs,
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void *data, uint32_t size)
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void *data, uint32_t size)
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{
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memcpy(cs->packets + cs->cdw, data, size * 4);
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cs->cdw += size;
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if (cs->section_ndw) {
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cs->section_cdw += size;
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cs->section_cdw += size;
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}
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}
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#endif
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@ -50,54 +50,54 @@ static inline int radeon_cs_setup_bo(struct radeon_cs_space_check *sc, struct ra
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/* legacy needs a static check */
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if (radeon_bo_is_static((struct radeon_bo *)sc->bo)) {
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bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
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return 0;
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bo->space_accounted = sc->new_accounted = (read_domains << 16) | write_domain;
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return 0;
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}
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/* already accounted this bo */
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if (write_domain && (write_domain == bo->space_accounted)) {
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sc->new_accounted = bo->space_accounted;
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return 0;
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sc->new_accounted = bo->space_accounted;
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return 0;
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}
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if (read_domains && ((read_domains << 16) == bo->space_accounted)) {
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sc->new_accounted = bo->space_accounted;
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return 0;
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sc->new_accounted = bo->space_accounted;
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return 0;
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}
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if (bo->space_accounted == 0) {
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if (write_domain == RADEON_GEM_DOMAIN_VRAM)
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sizes->op_vram_write += bo->size;
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else if (write_domain == RADEON_GEM_DOMAIN_GTT)
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sizes->op_gart_write += bo->size;
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else
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sizes->op_read += bo->size;
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sc->new_accounted = (read_domains << 16) | write_domain;
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if (write_domain == RADEON_GEM_DOMAIN_VRAM)
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sizes->op_vram_write += bo->size;
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else if (write_domain == RADEON_GEM_DOMAIN_GTT)
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sizes->op_gart_write += bo->size;
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else
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sizes->op_read += bo->size;
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sc->new_accounted = (read_domains << 16) | write_domain;
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} else {
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uint16_t old_read, old_write;
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uint16_t old_read, old_write;
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old_read = bo->space_accounted >> 16;
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old_write = bo->space_accounted & 0xffff;
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old_read = bo->space_accounted >> 16;
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old_write = bo->space_accounted & 0xffff;
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if (write_domain && (old_read & write_domain)) {
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sc->new_accounted = write_domain;
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/* moving from read to a write domain */
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if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
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sizes->op_read -= bo->size;
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sizes->op_vram_write += bo->size;
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} else if (write_domain == RADEON_GEM_DOMAIN_GTT) {
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sizes->op_read -= bo->size;
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sizes->op_gart_write += bo->size;
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}
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} else if (read_domains & old_write) {
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sc->new_accounted = bo->space_accounted & 0xffff;
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} else {
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/* rewrite the domains */
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if (write_domain != old_write)
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fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
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if (read_domains != old_read)
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fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
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return RADEON_CS_SPACE_FLUSH;
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}
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if (write_domain && (old_read & write_domain)) {
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sc->new_accounted = write_domain;
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/* moving from read to a write domain */
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if (write_domain == RADEON_GEM_DOMAIN_VRAM) {
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sizes->op_read -= bo->size;
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sizes->op_vram_write += bo->size;
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} else if (write_domain == RADEON_GEM_DOMAIN_GTT) {
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sizes->op_read -= bo->size;
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sizes->op_gart_write += bo->size;
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}
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} else if (read_domains & old_write) {
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sc->new_accounted = bo->space_accounted & 0xffff;
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} else {
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/* rewrite the domains */
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if (write_domain != old_write)
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fprintf(stderr,"WRITE DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, write_domain, old_write);
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if (read_domains != old_read)
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fprintf(stderr,"READ DOMAIN RELOC FAILURE 0x%x %d %d\n", bo->handle, read_domains, old_read);
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return RADEON_CS_SPACE_FLUSH;
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}
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}
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return 0;
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}
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@ -113,35 +113,35 @@ static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_s
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/* check the totals for this operation */
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if (cs->bo_count == 0 && !new_tmp)
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return 0;
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return 0;
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memset(&sizes, 0, sizeof(struct rad_sizes));
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/* prepare */
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for (i = 0; i < cs->bo_count; i++) {
|
||||
ret = radeon_cs_setup_bo(&cs->bos[i], &sizes);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = radeon_cs_setup_bo(&cs->bos[i], &sizes);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (new_tmp) {
|
||||
ret = radeon_cs_setup_bo(new_tmp, &sizes);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = radeon_cs_setup_bo(new_tmp, &sizes);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (sizes.op_read < 0)
|
||||
sizes.op_read = 0;
|
||||
sizes.op_read = 0;
|
||||
|
||||
/* check sizes - operation first */
|
||||
if ((sizes.op_read + sizes.op_gart_write > csm->gart_limit) ||
|
||||
(sizes.op_vram_write > csm->vram_limit)) {
|
||||
return RADEON_CS_SPACE_OP_TO_BIG;
|
||||
(sizes.op_vram_write > csm->vram_limit)) {
|
||||
return RADEON_CS_SPACE_OP_TO_BIG;
|
||||
}
|
||||
|
||||
if (((csm->vram_write_used + sizes.op_vram_write) > csm->vram_limit) ||
|
||||
((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) {
|
||||
return RADEON_CS_SPACE_FLUSH;
|
||||
((csm->read_used + csm->gart_write_used + sizes.op_gart_write + sizes.op_read) > csm->gart_limit)) {
|
||||
return RADEON_CS_SPACE_FLUSH;
|
||||
}
|
||||
|
||||
csm->gart_write_used += sizes.op_gart_write;
|
||||
|
@ -149,11 +149,11 @@ static int radeon_cs_do_space_check(struct radeon_cs_int *cs, struct radeon_cs_s
|
|||
csm->read_used += sizes.op_read;
|
||||
/* commit */
|
||||
for (i = 0; i < cs->bo_count; i++) {
|
||||
bo = cs->bos[i].bo;
|
||||
bo->space_accounted = cs->bos[i].new_accounted;
|
||||
bo = cs->bos[i].bo;
|
||||
bo->space_accounted = cs->bos[i].new_accounted;
|
||||
}
|
||||
if (new_tmp)
|
||||
new_tmp->bo->space_accounted = new_tmp->new_accounted;
|
||||
new_tmp->bo->space_accounted = new_tmp->new_accounted;
|
||||
|
||||
return RADEON_CS_SPACE_OK;
|
||||
}
|
||||
|
@ -164,10 +164,10 @@ void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *b
|
|||
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
|
||||
int i;
|
||||
for (i = 0; i < csi->bo_count; i++) {
|
||||
if (csi->bos[i].bo == boi &&
|
||||
csi->bos[i].read_domains == read_domains &&
|
||||
csi->bos[i].write_domain == write_domain)
|
||||
return;
|
||||
if (csi->bos[i].bo == boi &&
|
||||
csi->bos[i].read_domains == read_domains &&
|
||||
csi->bos[i].write_domain == write_domain)
|
||||
return;
|
||||
}
|
||||
radeon_bo_ref(bo);
|
||||
i = csi->bo_count;
|
||||
|
@ -181,7 +181,7 @@ void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs, struct radeon_bo *b
|
|||
}
|
||||
|
||||
static int radeon_cs_check_space_internal(struct radeon_cs_int *cs,
|
||||
struct radeon_cs_space_check *tmp_bo)
|
||||
struct radeon_cs_space_check *tmp_bo)
|
||||
{
|
||||
int ret;
|
||||
int flushed = 0;
|
||||
|
@ -189,20 +189,20 @@ static int radeon_cs_check_space_internal(struct radeon_cs_int *cs,
|
|||
again:
|
||||
ret = radeon_cs_do_space_check(cs, tmp_bo);
|
||||
if (ret == RADEON_CS_SPACE_OP_TO_BIG)
|
||||
return -1;
|
||||
return -1;
|
||||
if (ret == RADEON_CS_SPACE_FLUSH) {
|
||||
(*cs->space_flush_fn)(cs->space_flush_data);
|
||||
if (flushed)
|
||||
return -1;
|
||||
flushed = 1;
|
||||
goto again;
|
||||
(*cs->space_flush_fn)(cs->space_flush_data);
|
||||
if (flushed)
|
||||
return -1;
|
||||
flushed = 1;
|
||||
goto again;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
|
||||
struct radeon_bo *bo,
|
||||
uint32_t read_domains, uint32_t write_domain)
|
||||
struct radeon_bo *bo,
|
||||
uint32_t read_domains, uint32_t write_domain)
|
||||
{
|
||||
struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
|
||||
struct radeon_bo_int *boi = (struct radeon_bo_int *)bo;
|
||||
|
@ -211,10 +211,10 @@ int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
|
|||
int ret = 0;
|
||||
|
||||
if (bo) {
|
||||
temp_bo.bo = boi;
|
||||
temp_bo.read_domains = read_domains;
|
||||
temp_bo.write_domain = write_domain;
|
||||
temp_bo.new_accounted = 0;
|
||||
temp_bo.bo = boi;
|
||||
temp_bo.read_domains = read_domains;
|
||||
temp_bo.write_domain = write_domain;
|
||||
temp_bo.new_accounted = 0;
|
||||
}
|
||||
|
||||
ret = radeon_cs_check_space_internal(csi, bo ? &temp_bo : NULL);
|
||||
|
@ -232,13 +232,11 @@ void radeon_cs_space_reset_bos(struct radeon_cs *cs)
|
|||
struct radeon_cs_int *csi = (struct radeon_cs_int *)cs;
|
||||
int i;
|
||||
for (i = 0; i < csi->bo_count; i++) {
|
||||
radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo);
|
||||
csi->bos[i].bo = NULL;
|
||||
csi->bos[i].read_domains = 0;
|
||||
csi->bos[i].write_domain = 0;
|
||||
csi->bos[i].new_accounted = 0;
|
||||
radeon_bo_unref((struct radeon_bo *)csi->bos[i].bo);
|
||||
csi->bos[i].bo = NULL;
|
||||
csi->bos[i].read_domains = 0;
|
||||
csi->bos[i].write_domain = 0;
|
||||
csi->bos[i].new_accounted = 0;
|
||||
}
|
||||
csi->bo_count = 0;
|
||||
}
|
||||
|
||||
|
||||
|
|
Loading…
Reference in New Issue