intel: Get intel_decode.c minimally building.
My plan is to use this drm_intel_dump_batchbuffer() interface for the current GPU tools, and the current Mesa batch dumping usage, while eventually building more interesting interfaces for other uses. Warnings are currently suppressed by using a helper lib with CFLAGS set manually, because the code is totally not ready for libdrm's warnings setup. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Eugeni Dodonov <eugeni@dodonov.net>main
parent
bbdda928d3
commit
71066abe1e
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@ -33,7 +33,20 @@ AM_CFLAGS = \
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libdrm_intel_la_LTLIBRARIES = libdrm_intel.la
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libdrm_intel_ladir = $(libdir)
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libdrm_intel_la_LDFLAGS = -version-number 1:0:0 -no-undefined
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libdrm_intel_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@ @PCIACCESS_LIBS@ @CLOCK_LIB@
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libdrm_intel_la_LIBADD = ../libdrm.la \
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@PTHREADSTUBS_LIBS@ \
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@PCIACCESS_LIBS@ \
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@CLOCK_LIB@ \
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libintel_decode.la
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noinst_LTLIBRARIES = libintel_decode.la
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libintel_decode_la_SOURCES = intel_decode.c
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libintel_decode_la_CFLAGS = \
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-I$(top_srcdir) \
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-I$(top_srcdir)/intel \
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-std=c99
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libdrm_intel_la_SOURCES = \
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intel_bufmgr.c \
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@ -44,6 +57,8 @@ libdrm_intel_la_SOURCES = \
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mm.c \
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mm.h
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intel_bufmgr_gem_o_CFLAGS = $(AM_CFLAGS) -c99
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libdrm_intelincludedir = ${includedir}/libdrm
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libdrm_intelinclude_HEADERS = intel_bufmgr.h \
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intel_debug.h
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@ -190,6 +190,18 @@ void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
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void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr);
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void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr);
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struct drm_intel_decode *drm_intel_decode_context_alloc(uint32_t devid);
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void drm_intel_decode_context_free(struct drm_intel_decode *ctx);
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void drm_intel_decode_set_batch_pointer(struct drm_intel_decode *ctx,
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void *data, uint32_t hw_offset,
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int count);
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void drm_intel_decode_set_dump_past_end(struct drm_intel_decode *ctx,
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int dump_past_end);
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void drm_intel_decode_set_head_tail(struct drm_intel_decode *ctx,
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uint32_t head, uint32_t tail);
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void drm_intel_decode(struct drm_intel_decode *ctx);
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/** @{ Compatibility defines to keep old code building despite the symbol rename
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* from dri_* to drm_intel_*
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*/
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@ -22,13 +22,42 @@
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdbool.h>
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#include <stdarg.h>
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#include <string.h>
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#include "intel_decode.h"
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#include "intel_chipset.h"
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#include "intel_gpu_tools.h"
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#include "intel_bufmgr.h"
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/* Struct for tracking drm_intel_decode state. */
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struct drm_intel_decode {
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/** PCI device ID. */
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uint32_t devid;
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/** GPU address of the start of the batchbuffer data. */
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uint32_t hw_offset;
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/** CPU Virtual address of the start of the batchbuffer data. */
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uint32_t *data;
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/** Number of DWORDs of batchbuffer data. */
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uint32_t count;
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/** @{
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* GPU head and tail pointers, which will be noted in the dump, or ~0.
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*/
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uint32_t head, tail;
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/** @} */
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/**
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* Whether to dump the dwords after MI_BATCHBUFFER_END.
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*
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* This sometimes provides clues in corrupted batchbuffers,
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* and is used by the intel-gpu-tools.
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*/
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bool dump_past_end;
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};
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static FILE *out;
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static uint32_t saved_s2 = 0, saved_s4 = 0;
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@ -3278,7 +3307,7 @@ decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid,
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return len;
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case 0x7a00:
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if (intel_gen(devid) >= 6) {
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if (IS_GEN6(devid) || IS_GEN7(devid)) {
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int i;
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len = (data[0] & 0xff) + 2;
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if (len != 4 && len != 5)
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@ -3505,6 +3534,50 @@ decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid,
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return 1;
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}
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struct drm_intel_decode *
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drm_intel_decode_context_alloc(uint32_t devid)
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{
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struct drm_intel_decode *ctx;
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ctx = calloc(1, sizeof(struct drm_intel_decode));
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if (!ctx)
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return NULL;
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ctx->devid = devid;
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return ctx;
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}
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void
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drm_intel_decode_context_free(struct drm_intel_decode *ctx)
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{
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free(ctx);
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}
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void
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drm_intel_decode_set_dump_past_end(struct drm_intel_decode *ctx,
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int dump_past_end)
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{
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ctx->dump_past_end = !!dump_past_end;
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}
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void
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drm_intel_decode_set_batch_pointer(struct drm_intel_decode *ctx,
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void *data, uint32_t hw_offset, int count)
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{
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ctx->data = data;
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ctx->hw_offset = hw_offset;
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ctx->count = count;
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}
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void
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drm_intel_decode_set_head_tail(struct drm_intel_decode *ctx,
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uint32_t head, uint32_t tail)
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{
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ctx->head = head;
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ctx->tail = tail;
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}
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/**
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* Decodes an i830-i915 batch buffer, writing the output to stdout.
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*
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* \param count number of DWORDs to decode in the batch buffer
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* \param hw_offset hardware address for the buffer
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*/
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int
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intel_decode(uint32_t *data, int count,
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uint32_t hw_offset,
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uint32_t devid, uint32_t ignore_end_of_batchbuffer)
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void
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drm_intel_decode(struct drm_intel_decode *ctx)
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{
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int ret;
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int index = 0;
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int failures = 0;
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uint32_t *data;
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uint32_t count, hw_offset;
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uint32_t devid;
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if (!ctx)
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return;
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data = ctx->data;
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count = ctx->count;
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hw_offset = ctx->hw_offset;
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devid = ctx->devid;
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head_offset = ctx->head;
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tail_offset = ctx->tail;
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saved_s2_set = 0;
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saved_s4_set = 1;
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out = stdout;
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@ -3536,7 +3623,7 @@ intel_decode(uint32_t *data, int count,
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* case.
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*/
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if (ret == -1) {
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if (ignore_end_of_batchbuffer) {
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if (ctx->dump_past_end) {
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index++;
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} else {
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for (index = index + 1; index < count;
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@ -3553,7 +3640,7 @@ intel_decode(uint32_t *data, int count,
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hw_offset + index * 4, &failures);
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break;
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case 0x3:
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if (IS_965(devid)) {
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if (IS_9XX(devid) && !IS_GEN3(devid)) {
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index +=
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decode_3d_965(data + index, count - index,
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hw_offset + index * 4, devid,
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}
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fflush(out);
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}
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return failures;
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}
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void intel_decode_context_reset(void)
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{
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saved_s2_set = 0;
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saved_s4_set = 1;
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}
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void intel_decode_context_set_head_tail(uint32_t head, uint32_t tail)
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{
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head_offset = head;
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tail_offset = tail;
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}
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